8085 instruction set (detailed)

Classification Of Instruction Set
There are 5 categories:
• (1) Data Transfer Instruction,
• (2) Arithmetic Instructions,
• (3) Logical Instructions,
• (4) Branching Instructions,
• (5) Control Instructions,

(1) Data Transfer Instructions
• MOV Rd, Rs
• MOV M, Rs
• MOV Rd, M
• This instruction copies the contents of the
source register into the destination register.
• The contents of the source register are not
altered.
• Example: MOV B,A or MOV M,B or MOV C,M

A 20 B 20
A F
B 30 C
D E
H 20 L 50
A 20 B
BEFORE EXECUTION AFTER EXECUTION
MOV B,A
A F
B 30 C
D E
H 20 L 50
A F
B C
D E
H 20 L 50
A F
B C 40
D E
H 20 L 50
MOV M,B
MOV C,M
40 40
30

• MVI R, Data(8-bit)
• MVI M, Data(8-bit)
• The 8-bit immediate data is stored in the
destination register (R) or memory (M), R is
general purpose 8 bit register such as
A,B,C,D,E,H and L.
• Example: MVI B, 60H or MVI M, 40H

A F
B C
D E
H L
A F
B 60 C
D E
H L
AFTER EXECUTIONBEFORE EXECUTION
MVI B,60H
40
HL=2050H
2051H
204FH 204FH
HL=2050H
2051H
MVI M,40H

• LDA 16-bit address
• The contents of a memory location, specified
by a 16-bit address in the operand, are
copied to the accumulator (A).
• The contents of the source are not altered.
• Example: LDA 2000H

A
30
A 30
30
LDA 2000H
2000H 2000H

• LDAX Register Pair
• Load accumulator (A) with the contents of
memory location whose address is specified
by BC or DE or register pair.
• The contents of either the register pair or the
memory location are not altered.
• Example: LDAX D

A F
B C
D 20 E 30
A 80 F
B C
D 20 E 30
80 80
LDAX D
2030H 2030H

• STA 16-bit address
• The contents of accumulator are copied into
the memory location i.e. address specified by
the operand in the instruction.
• Example: STA 2000 H

A 50 A 50
50
STA 2000H2000H 2000H

• STAX Register Pair
• Store the contents of accumulator (A) into
the memory location whose address is
specified by BC Or DE register pair.
• Example: STAX B

A 50 F
B 10 C 20
D E
A 50 F
B 10 C 20
D E
50
STAX B
1020H 1020H

• SHLD 16-bit address
• Store H-L register pair in memory.
• The contents of register L are stored into
memory location specified by the 16-bit
address.
• The contents of register H are stored into the
next memory location.
• Example: SHLD 2500 H

H 30 L 60
60
30
H 30 L 60
SHLD 2500H2500H 2500H
204FH
2502H
204FH
2502H

• XCHG
• The contents of register H are exchanged
with the contents of register D.
• The contents of register L are exchanged with
the contents of register E.
• Example: XCHG

D 20 E 40
H 70 L 80
D 70 E 80
H 20 L 40
XCHG

• SPHL
• Move data from H-L pair to the Stack Pointer
(SP)
• This instruction loads the contents of H-L pair
into SP.
• Example: SPHL

H 25 L 00
SP
BEFORE EXECUTION
AFTER EXECUTION
H 25 L 00
SP 2500
SPHL

• XTHL
• Exchange H–L with top of stack
• The contents of L register are exchanged with
the location pointed out by the contents of
the SP.
• The contents of H register are exchanged
with the next location (SP + 1).
• Example: XTHL

H
30
L
40
SP 2700
BEFORE EXECUTION
50
60
H
60
L
50
SP 2700 40
30
AFTER EXECUTION
XTHL
2700H
2701H
2702H
2700H
2701H
2702H
L=SP
H=(SP+1)

• PCHL
• Load program counter with H-L contents
• The contents of registers H and L are copied into
the program counter (PC).
• The contents of H are placed as the high-order
byte and the contents of L as the low-order
byte.
•

H
60
L
00
PC
H
60
L
00
PC 6000
PCHL

• IN 8-bit port address
• Copy data to accumulator from a port with 8-
bit address.
• The contents of I/O port are copied into
accumulator.
• Example: IN 80 H

10 A
10 A 10
BEFORE EXECUTION
AFTER EXECUTION
IN 80H
PORT 80H
PORT 80H

• OUT 8-bit port address
• Copy data from accumulator to a port with 8-
bit address
• The contents of accumulator are copied into
the I/O port.
• Example: OUT 50 H

10 A 40
40 A 40
BEFORE EXECUTION
AFTER EXECUTION
OUT 50H
PORT 50H
PORT 50H

Arithematic Instructions
• These instructions perform the operations
like:
• Addition
• Subtraction
• Increment
• Decrement

(1) Arithematic Instructions
• ADD R
• ADD M
• The contents of register or memory are added
to the contents of accumulator.
• The result is stored in accumulator.
• If the operand is memory location, its address is
specified by H-L pair.
• Example: ADD C or ADD M

B C 30
D E
H L
B C 30
D E
H L
B C
D E
H 20 L 50
B C
D E
H 20 L 50
A 20
A 50A 20
A 30
ADD C
A=A+R
ADD M
A=A+M
10 10
2050 2050

• ADC R
• ADC M
• The contents of register or memory and Carry Flag
(CY) are added to the contents of accumulator.
specified by H-L pair. All flags are modified to reflect
the result of the addition.
• Example: ADC C or ADC M

B C 20
D E
H L
A 50
B C 20
D E
H L
A 71
ADC C
A=A+R+CY
CY 1 CY 0
CY 1 CY 0
A 20 A 51
H 20 L 50 H 20 L 50
ADC M
A=A+M+CY
30 302050H 2050H

• ADI 8-bit data
• The 8-bit data is added to the contents of
accumulator.
• Example: ADI 10 H

A 50 A 60
ADI 10H
A=A+DATA(8)

• ACI 8-bit data
• The 8-bit data and the Carry Flag (CY) are
added to the contents of accumulator.
• Example: ACI 20 H

CY 1 CY 0
A 30 A 51
ACI 20H
A=A+DATA
(8)+CY

• DAD Register pair
• The 16-bit contents of the register pair are
added to the contents of H-L pair.
• The result is stored in H-L pair.
• If the result is larger than 16 bits, then CY is
set.
• Example: DAD D

B C
D 10 E 20
H 20 L 50
SP
B C
D 10 E 20
H 30 L 70
SP
CY 0 CY 0
DAD D
HL=HL+R

• SUB R
• SUB M
• The contents of the register or memory location are
subtracted from the contents of the accumulator.
specified by H-L pair.
• Example: SUB B or SUB M

B 30 C
D E
H L
A 50
B 30 C
D E
H L
A 20
SUB B
A=A-R
A 50 A 40
H
10
L
20
H
10
L
20
SUB M
A=A-M
10 10
1020H1020H

• SBB R
• SBB M
• The contents of the register or memory location and
Borrow Flag (i.e.CY) are subtracted from the contents of
the accumulator.
• If the operand is memory location, its address is specified
by H-L pair.
• Example: SBB C or SBB M

B C 20
D E
H L
A 40
CY 1
B C 20
D E
H L
A 19
CY 0
SBB C
A=A-R-CY
CY 1
A 50
H
20
L
50
CY 0
A 39
H
20
L
50
SBB M
A=A-M-CY
10 10
2050H 2050H

• SUI 8-bit data
• OPERATION: A=A-DATA(8)
• The 8-bit immediate data is subtracted from
the contents of the accumulator.
• Example: SUI 45 H

• SBI 8-bit data
• The 8-bit data and the Borrow Flag (i.e. CY) is
subtracted from the contents of the
accumulator.
• Example: SBI 20 H

CY 1
A 50
CY 0
A 29SBI 20H
A=A-DATA(8)-CY

• INR R
• INR M
• The contents of register or memory location are
incremented by 1.
• The result is stored in the same place.
• If the operand is a memory location, its address
is specified by the contents of H-L pair.
• Example: INR B or INR M

B 10 C
D E
H L
A
B 11 C
D E
H L
A
H
20
L
50
H
20
L
50
30 31
2050H 2050H
INR M
M=M+1
B 10 C
D E
H L
A
BEFORE EXECUTION
INR B
R=R+1

• INX Rp
• The contents of register pair are incremented
by 1.
• Example: INX H

B C
D E
H 10 L 20
B C
D E
H 11 L 21
SPSP
INX H
RP=RP+1

• DCR R
• DCR M
• The contents of register or memory location are
decremented by 1.
• If the operand is a memory location, its address
is specified by the contents of H-L pair.
• Example: DCR E or DCR M

B C
D E 19
H L
A
AFTER EXECUTION
B C
D E 20
H L
A
BEFORE EXECUTION
DCR E
R=R-1
H
20
L
50
H
20
L
5021 20
2050H
DCR M
M=M-1
2050H

• DCX Rp
• The contents of register pair are decremented
by 1.
• Example: DCX D

B C
D 10 E 20
H L
B C
D 10 E 19
H L
SPSP
DCX D
RP=RP-1

(1) Logical Instructions
• ANA R
• ANA M
• AND specified data in register or memory with
accumulator.
• Store the result in accumulator (A).
• Example: ANA B, ANA M

B 10 C
D E
H L
A
B 0F C
D E
H L
A 0A
AFTER EXECUTION
ANA B
A=A and R
B 0F C
D E
H L
A AA
BEFORE EXECUTION
CY AC CY 0 AC 1
CY AC CY 0 AC 1
A 11A 55
H 20 L 50 H 20 L 50
B3 B3
2050H
ANA M
A=A and M
2050H
1010 1010=AAH
0000 1111=0FH
0000 1010=0AH
0101 0101=55H
1011 0011=B3H
0001 0001=11H

• ANI 8-bit data
• AND 8-bit data with accumulator (A).
• Store the result in accumulator (A)
• Example: ANI 3FH

CY AC
A B3
CY 0 AC 1
A 33
ANI 3FH
A=A and DATA(8)
1011 0011=B3H
0011 1111=3FH
0011 0011=33H

• XRA Register (8-bit)
• XOR specified register with accumulator.
• Store the result in accumulator.
• Example: XRA C

B 10 C
D E
H L
A
B C 2D
D E
H L
A 87
AFTER EXECUTION
XRA C
A=A xor R
B C 2D
D E
H L
A AA
BEFORE EXECUTION
CY AC CY 0 AC 0
1010 1010=AAH
0010 1101=2DH
1000 0111=87H

• XRA M
• XOR data in memory (memory location
pointed by H-L pair) with Accumulator.
• Store the result in Accumulator.
• Example: XRA M

H 20 L 50
A 55
AFTER EXECUTION
XRA M
A=A xor M
BEFORE EXECUTION
CY AC CY 0 AC 0
0101 0101=55H
1011 0011=B3H
1110 0110=E6H
H 20 L 50
A E6
B3 B3
2050H 2050H

• XRI 8-bit data
• XOR 8-bit immediate data with accumulator (A).
• Example: XRI 39H

CY AC
A B3
CY 0 AC 0
A 8A
XRI 39H
A=A xor DATA(8)
1011 0011=B3H
0011 1001=39H
1000 1010=8AH

• ORA Register
• OR specified register with accumulator (A).
• Example: ORA B

CY AC
ORA B
A=A or R
1010 1010=AAH
0001 0010=12H
1011 1010=BAH
B 12 C
D E
H L
A AA
B 12 C
D E
H L
A BA
CY 0 AC 0

• ORA M
• OR specified register with accumulator (A).
• Example: ORA M

CY AC
ORA M
A=A or M
0101 0101=55H
1011 0011=B3H
1111 0111=F7H
H 20 L 50
A 55 A F7
CY 0 AC 0
H 20 L 50
B3 B3
2050H 2050H

• ORI 8-bit data
• OR 8-bit data with accumulator (A).
• Example: ORI 08H

CY AC
A B3
CY 0 AC 0
A BB
ORI 08H
A=A or DATA(8)
1011 0011=B3H
0000 1000=08H
1011 1011=BBH

• CMP Register
• CMP M
• Compare specified data in register or memory
with accumulator (A).
• Example: CMP D or CMP M

B 10 C
D E
H L
A
B C
D B9 E
H L
A B8
AFTER EXECUTION
CMP D
A-R
B C
D B9 E
H L
A B8
BEFORE EXECUTION
CY Z CY 0 Z 0
CY Z CY 0 Z 1
A B8A B8
H 20 L 50 H 20 L 50
B8 B8
2050H
CMP M
A-M
2050H
A>R: CY=0,Z=0
A=R: CY=0,Z=1
A<R: CY=1,Z=0
A>M: CY=0,Z=0
A=M: CY=0,Z=1
A<M: CY=1,Z=0

• CPI 8-bit data
• Compare 8-bit immediate data with
accumulator (A).
• Example: CPI 30H

CY Z
A BA
CY 0 AC 0
A BA
CPI 30H
A-DATA
A>DATA: CY=0,Z=0
A=DATA: CY=0,Z=1
A<DATA: CY=1,Z=0
1011 1010=BAH

• STC
• It sets the carry flag to 1.
• Example: STC

CY 0
CY 1STC
CY=1

• CMC
• It complements the carry flag.
• Example: CMC

CY 1
CY 0
CMC

• CMA
• It complements each bit of the accumulator.
• Example: CMA

• RLC
• Rotate accumulator left
• Each binary bit of the accumulator is rotated left
by one position.
• Bit D7 is placed in the position of D0 as well as
in the Carry flag.
• CY is modified according to bit D7.
• Example: RLC.

B7 B6 B5 B4 B3 B2 B1 B0CY
B6 B5 B4 B3 B2 B1 B0 B7B7
AFTER EXECUTION
BEFORE EXECUTION

• RRC
• Rotate accumulator right
• Each binary bit of the accumulator is rotated right by
one
• position.
• Bit D0 is placed in the position of D7 as well as in the
Carry flag.
• Example: RRC.

B7 B6 B5 B4 B3 B2 B1 B0 CY
B0 B7 B6 B5 B4 B3 B2 B1 B0
AFTER EXECUTION
BEFORE EXECUTION

• RAL
• Rotate accumulator left through carry
by one position through the Carry flag.
• Bit D7 is placed in the Carry flag, and the Carry
flag is placed in the least significant position D0.
• Example: RAL.

B7 B6 B5 B4 B3 B2 B1 B0CY
B6 B5 B4 B3 B2 B1 B0 CYB7
AFTER EXECUTION
BEFORE EXECUTION

• RAR
• Rotate accumulator right through carry
by one position through the Carry flag.
• Bit D7 is placed in the Carry flag, and the Carry
flag is placed in the least significant position D0.
• Example: RAR

B7 B6 B5 B4 B3 B2 B1 B0 CY
CY B7 B6 B5 B4 B3 B2 B1 B0
AFTER EXECUTION
BEFORE EXECUTION

Branching Instructions
• The branch group instructions allows the
microprocessor to change the sequence of
program either conditionally or under certain
test conditions. The group includes,
• (1) Jump instructions,
• (2) Call and Return instructions,
• (3) Restart instructions,

(1) Branching Instructions
• JUMP ADDRESS
• BEFORE EXECUTION AFTER EXECUTION
• Jump unconditionally to the address.
• The instruction loads the PC with the address
given within the instruction and resumes the
program execution from specified location.
• Example: JMP 200H
PC PC 2000JMP 2000H

• CALL address
• Call unconditionally a subroutine whose
starting address given within the
instruction and used to transfer
program control to a subprogram or
subroutine.
• Example: CALL 2000H

Conditional Calls
Instruction Code Description Condition for CALL
CC Call on carry CY=1
CNC Call on not carry CY=0
CP Call on positive S=0
CM Call on minus S=1
CPE Call on parity even P=1
CPO Call on parity odd P=0
CZ Call on zero Z=1
CNZ Call on not zero Z=0

• RET
• Return from the subroutine unconditionally.
• This instruction takes return address from
the stack and loads the program counter
with this address.
• Example: RET

SP 27FD
PC
00
62
SP 27FF
PC 6200
00
62
RET
27FFH
27FEH
27FDH
27FFH
27FEH
27FDH

• RST n
• Restart n (0 to 7)
• This instruction transfers the program
control to a specific memory address. The
processor multiplies the RST number by 8 to
calculate the vector address.
• Example: RST 6

SP 3000
PC 2000
SP 2999
PC 0030
01
20
RST 6
3000H
2FFFH
2FFEH
SP-1
ADDRESS OF THE NEXT INSTRUCTION IS 2001H
3000H
2FFFH
2FFEH

Vector Address For Return
Instructions
Instruction Code Vector Address
RST 0 0*8=0000H
RST 1 0*8=0008H
RST 2 0*8=0010H
RST 3 0*8=0018H
RST 4 0*8=0020H
RST 5 0*8=0028H
RST 6 0*8=0030H
Rst 7 0*8=0038H

(1) Control Instructions
• NOP
• No operation
• No operation is performed.
• The instruction is fetched and decoded but no
operation is executed.
• Example: NOP

• HLT
• Halt
• The CPU finishes executing the current
instruction and halts any further execution.
• An interrupt or reset is necessary to exit from
the halt state.
• Example: HLT

RST5.5 Mask
RST6.5 Mask
RST7.5 Mask
}
0 – Available
(not masked)
1 - Masked
Mask Set Enable 0 -
Ignore bits 0-2
1 - Set the masks
according to bits 0-2
Force RST7.5 Flip Flop to
reset
Not Used
Enable Serial Data
0 - Ignore bit 7
1 - Send bit 7 to SOD
pin
Serial Data Output
While EI/DI instructions enable/disable all maskable interrupts at once, SIM
instruction can be used to selectively mask (or disable) 3 out of 4 maskable
interrupts which are RST7.5,RST6.5 & RST5.5. Fourth maskable interrupt INTR
can only be enabled/disabled by using EI/DI instructions.
SIM instruction can be used to perform two different tasks: 1. For masking of 3
interrupts 2. For serial data transmission (Each time a SIM instruction is executed, 7th
bit
of Accumulator is automatically copied to SOD pin of 8085)

Example of how to use SIM instruction in any program
Example problem:- Set the interrupt masks so that RST5.5 is enabled, RST6.5 is
masked & RST7.5 is enabled.
• We can determine the bit pattern as per format of SIM instruction given below:
- Enable 5.5
- Disable 6.5
- Enable 7.5
- Allow setting the
masks
- Don’t reset the flip flop
- Bit 5 is not used
- Don’t use serial data
- Serial data is ignored
bit 0 = 0
bit 1 = 1
bit 2 = 0
bit 3 = 1
bit 4 = 0
bit 5 = 0
bit 6 = 0
bit 7 = 0
0 0 0 0 1 0 1 0
Contents of accumulator are:
0AH
EI
MVI A,
0A SIM
• Now use following set of instructions to implement required masks using SIM
 First of all enable all interrupts using EI instruction without using which SIM wouldn't be
effective
 Move the prepared bit pattern (0AH here) to Accumulator
 SIM instruction interprets contents of Accumulator same as per the above format &
performs the desired operation of masking the respective interrupts

7 6 5 4 3 2 1 0
RST5.5 Mask
RST6.5 Mask
RST7.5 Mask
}
Indicates current
masking status of
interrupts set by user
(using SIM)
0 - Available
1 - Masked
Status of Interrupt Enable Flip Flop: 1
Set 0 Reset
Serial Data In
RST5.5 Interrupt
Pending RST6.5
Interrupt Pending
RST7.5 Interrupt
Pending
Like SIM instruction, RIM can be used to perform two different tasks: 1. To read
current status of 3 maskable interrupts 2. For serial data reception (Each time a SIM
instruction is executed, the bit present on SID pin of 8085 is automatically moved to 7th
bit of the Accumulator)
Pending Interrupts: Since the 8085 has 5 interrupt lines, another interrupts may
occur while an interrupt is being attended and thus remain pending. Such
interrupts are called pending interrupts & would be attended as soon as ISR of
current interrupt is executed. A programmer may know the status (current value
of high/low on the respective interrupt pin) of such interrupts anytime by using
RIM instruction.

8085 instruction set (detailed)

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8085 instruction set (detailed)