Download to read offline
![+
Direct Addressing Diagram
Address A = 1002
Opcode
Instruction
Memory
Operand = 5
ADD A
1002
1001
1004
AC AC + [1002]
Or, AC AC + 5](https://image.slidesharecdn.com/ch13-coa10eupdate-241130091724-c2f89d39/75/CH13-COA10e-update-Addressing-mode-of-instruction-pptx-7-2048.jpg)
![+
Indirect Addressing
Reference to the address of a word in memory which
contains a full-length address of the operand
EA = [[A]]
Parentheses are to be interpreted as meaning contents of
Advantage:
For a word length of N an address space of 2N
is now available
Disadvantage:
Instruction execution requires two memory references to fetch the
operand
One to get its address and a second to get its value](https://image.slidesharecdn.com/ch13-coa10eupdate-241130091724-c2f89d39/75/CH13-COA10e-update-Addressing-mode-of-instruction-pptx-8-2048.jpg)
![+
Indirect Addressing Diagram
Opcode
Instruction
Memory
Operand = 5
Pointer to operand = 1002
1002
1001
1004
Address A = [[1001]]
MOV R1, A
R1 [[1001]]
Or, R1 [1002]
Or, R1 5
Address of R1](https://image.slidesharecdn.com/ch13-coa10eupdate-241130091724-c2f89d39/75/CH13-COA10e-update-Addressing-mode-of-instruction-pptx-9-2048.jpg)
![+
Register Indirect Addressing
Analogous to indirect addressing
The only difference is whether the address field refers to a
memory location or a register
EA = [[R]]
Large address space (2n
)
One fewer memory access than indirect addressing](https://image.slidesharecdn.com/ch13-coa10eupdate-241130091724-c2f89d39/75/CH13-COA10e-update-Addressing-mode-of-instruction-pptx-12-2048.jpg)
![+
Memory
Operand = 8
Registers
Register Indirect Addressing
Diagram
MOV R1, [[R2]]
R1 [[1002]]
Or, R1 [2003]
Or, R1 8
1002
1001
1004
Pointer to Operand
[2003]
2002
2001
1004
2003
Instruction
Opcode Register Address of R2
Register Address of R1](https://image.slidesharecdn.com/ch13-coa10eupdate-241130091724-c2f89d39/75/CH13-COA10e-update-Addressing-mode-of-instruction-pptx-13-2048.jpg)
More Related Content
Similar to CH13-COA10e update Addressing mode of instruction.pptx
CH13-COA10e update Addressing mode of instruction.pptx
- 1.
- 2. + Addressing Modes Immediate Direct Indirect Register Register indirect Displacement Stack The address field or fields in a typical instruction format are relatively small. We would like to be able to reference a large range of locations in main memory or, for some systems, virtual memory. To achieve this objective, a variety of addressing techniques has been employed
- 3. + Effective address Usefulnessof addressing modes • virtually all computer architectures provide more than one of these addressing modes. • To reduce the period the implementation of programs the effective address (EA). In a system without virtual memory, the effective address will be either a main memory address or a register. In a virtual memory system the effective address is a virtual address or a register.
- 4. + Relationship ( CISC) and(RISC) of addressing modes Complex Instruction Set Computer (CISC) designs provide a large number of addressing modes. The main motivations are (1) To support complex data structures (2) To provide flexibility to access operands Reduced Instruction Set Computer(RISC) Typically, a RISC machine, unlike a CISC machine, uses a simple and relatively straightforward set of addressing modes.
- 5. + Immediate Addressing Simplestform of addressing Operand = A Operand is part of instruction Operand = address field e.g. ADD 5 Add 5 to contents of accumulator 5 is operand No memory reference to fetch data Fast Limited range Operand Opcode Instruction ADD 5 AC AC + 5
- 6. + Direct Addressing Simpleform of addressing Address field contains address of operand Effective address (EA) = address field (A) e.g. ADD A Add contents of cell A to accumulator Look in memory at address A for operand Single memory reference to access data No additional calculations to work out effective address Limited address space
- 7. + Direct Addressing Diagram AddressA = 1002 Opcode Instruction Memory Operand = 5 ADD A 1002 1001 1004 AC AC + [1002] Or, AC AC + 5
- 8. + Indirect Addressing Referenceto the address of a word in memory which contains a full-length address of the operand EA = [[A]] Parentheses are to be interpreted as meaning contents of Advantage: For a word length of N an address space of 2N is now available Disadvantage: Instruction execution requires two memory references to fetch the operand One to get its address and a second to get its value
- 9. + Indirect Addressing Diagram Opcode Instruction Memory Operand= 5 Pointer to operand = 1002 1002 1001 1004 Address A = [[1001]] MOV R1, A R1 [[1001]] Or, R1 [1002] Or, R1 5 Address of R1
- 10. + Register (Direct) Addressing Address field refers to a register rather than a main memory address EA = R Limited number of registers Very small address field needed Shorter instructions Faster instruction fetch No memory access Very limited address space Multiple registers helps performance
- 11. + Register Addressing Diagram Instruction Registers Operand= 5 SUB R1, R2 R1 R1 - R2 Or, R1 5 - 2 Or, R1 3 Opcode Register Address of R2 Register Address of R1 1002 1001 1004 Operand = 2
- 12. + Register Indirect Addressing Analogous to indirect addressing The only difference is whether the address field refers to a memory location or a register EA = [[R]] Large address space (2n ) One fewer memory access than indirect addressing
- 13. + Memory Operand = 8 Registers RegisterIndirect Addressing Diagram MOV R1, [[R2]] R1 [[1002]] Or, R1 [2003] Or, R1 8 1002 1001 1004 Pointer to Operand [2003] 2002 2001 1004 2003 Instruction Opcode Register Address of R2 Register Address of R1
- 14. + Displacement Addressing Combinesthe capabilities of direct addressing and register indirect addressing EA = A + (R) Requires that the instruction have two address fields, at least one of which is explicit The value contained in one address field (value = A) is used directly The other address field refers to a register whose contents are added to A to produce the effective address Most common uses: Relative addressing Base-register addressing Indexing
- 15. + Displacement Addressing Diagram RegisterR Opcode Instruction Memory Operand Pointer to Operand Registers Address A +
- 16. + Relative Addressing Theimplicitly referenced register is the program counter (PC) The next instruction address is added to the address field to produce the EA Typically the address field is treated as a twos complement number for this operation Thus the effective address is a displacement relative to the address of the instruction R = Program counter, PC EA = A + (PC) PC contains the main address EA = PC+ Displacement address Operand A = Displacement address PC + Displacement address = Data
- 17. + Relative Addressing Opcode Instruction Memory Operand =FFh 1001 Address A = 02h + PC 1001 1003 1005 ADDPCRelative 02h AC FFh
- 18. + Base-Register Addressing Aholds displacement R holds pointer to base address R may be explicit or implicit e.g. segment registers in 80x86
- 19. + Indexed Addressing Theaddress field references a main memory address and the referenced register contains a positive displacement from that address The method of calculating the EA is the same as for base-register addressing Autoindexing Automatically increment or decrement the index register after each reference to it EA = A + (R) (R) (R) + 1 Postindexing Indexing is performed after the indirection EA = (A) + (R) Preindexing Indexing is performed before the indirection EA = (A + (R))
- 20. + A =base R = displacement EA = A + R Good for accessing arrays EA = A + R R++ Indexed Addressing
- 21. + Stack Addressing Astack is a linear array of locations Sometimes referred to as a pushdown list or last-in-first-out queue A stack is a reserved block of locations Items are appended to the top of the stack so that the block is partially filled Associated with the stack is a pointer whose value is the address of the top of the stack The stack pointer is maintained in a register Thus references to stack locations in memory are in fact register indirect addresses Is a form of implied addressing The machine instructions need not include a memory reference but implicitly operate on the top of the stack
- 22. + Autoincrement /AutodecrementMode A special case of indirect register mode. The register whose number is included in the instruction code, contains the address of the operand. Autoincrement Mode = after operand addressing , the contents of the register is incremented. Decrement Mode = before operand addressing, the contents of the register is decrement. (Effective address = contents of base register) or implicitly e.g. INCA (Increment Accumulator)
Editor's Notes
- #1 Lecture slides prepared for “Computer Organization and Architecture”, 9/e, by William Stallings, Chapter 13 “Instruction Sets: Addressing Modes and Formats”.
- #2 The address field or fields in a typical instruction format are relatively small. We would like to be able to reference a large range of locations in main memory or, for some systems, virtual memory. To achieve this objective, a variety of addressing techniques has been employed. They all involve some trade-off between address range and/or addressing flexibility, on the one hand, and the number of memory references in the instruction and/or the complexity of address calculation, on the other. In this section, we examine the most common addressing techniques, or modes: • Immediate • Direct • Indirect • Register • Register indirect • Displacement • Stack
- #5 The simplest form of addressing is immediate addressing, in which the operand value is present in the instruction Operand = A This mode can be used to define and use constants or set initial values of variables. Typically, the number will be stored in twos complement form; the leftmost bit of the operand field is used as a sign bit. When the operand is loaded into a data register, the sign bit is extended to the left to the full data word size. In some cases, the immediate binary value is interpreted as an unsigned nonnegative integer. The advantage of immediate addressing is that no memory reference other than the instruction fetch is required to obtain the operand, thus saving one memory or cache cycle in the instruction cycle. The disadvantage is that the size of the number is restricted to the size of the address field, which, in most instruction sets, is small compared with the word length.
- #8 With direct addressing, the length of the address field is usually less than the word length, thus limiting the address range. One solution is to have the address field refer to the address of a word in memory, which in turn contains a full-length address of the operand. This is known as indirect addressing: EA = (A) As defined earlier, the parentheses are to be interpreted as meaning contents of. The obvious advantage of this approach is that for a word length of N, an address space of 2N is now available. The disadvantage is that instruction execution requires two memory references to fetch the operand: one to get its address and a second to get its value. Although the number of words that can be addressed is now equal to 2N, the number of different effective addresses that may be referenced at any one time is limited to 2K, where K is the length of the address field. Typically, this is not a burdensome restriction, and it can be an asset. In a virtual memory environment, all the effective address locations can be confined to page 0 of any process. Because the address field of an instruction is small, it will naturally produce low-numbered direct addresses, which would appear in page 0. (The only restriction is that the page size must be greater than or equal to 2K.) When a process is active, there will be repeated references to page 0, causing it to remain in real memory. Thus, an indirect memory reference will involve, at most, one page fault rather than two. A rarely used variant of indirect addressing is multilevel or cascaded indirect addressing: EA = ( . . . (A) . . . ) In this case, one bit of a full-word address is an indirect flag (I). If the I bit is 0, then the word contains the EA. If the I bit is 1, then another level of indirection is invoked. There does not appear to be any particular advantage to this approach, and its disadvantage is that three or more memory references could be required to fetch an operand.
- #10 Register addressing is similar to direct addressing. The only difference is that the address field refers to a register rather than a main memory address: EA = R To clarify, if the contents of a register address field in an instruction is 5, then register R5 is the intended address, and the operand value is contained in R5. Typically, an address field that references registers will have from 3 to 5 bits, so that a total of from 8 to 32 general-purpose registers can be referenced. The advantages of register addressing are that (1) only a small address field is needed in the instruction, and (2) no time-consuming memory references are required. As was discussed in Chapter 4, the memory access time for a register internal to the processor is much less than that for a main memory address. The disadvantage of register addressing is that the address space is very limited. If register addressing is heavily used in an instruction set, this implies that the processor registers will be heavily used. Because of the severely limited number of registers (compared with main memory locations), their use in this fashion makes sense only if they are employed efficiently. If every operand is brought into a register from main memory, operated on once, and then returned to main memory, then a wasteful intermediate step has been added. If, instead, the operand in a register remains in use for multiple operations, then a real savings is achieved. An example is the intermediate result in a calculation. In particular, suppose that the algorithm for twos complement multiplication were to be implemented in software. The location labeled A in the flowchart (Figure 10.12) is referenced many times and should be implemented in a register rather than a main memory location. It is up to the programmer or compiler to decide which values should remain in registers and which should be stored in main memory. Most modern processors employ multiple general-purpose registers, placing a burden for efficient execution on the assembly-language programmer (e.g., compiler writer).
- #12 Just as register addressing is analogous to direct addressing, register indirect addressing is analogous to indirect addressing. In both cases, the only difference is whether the address field refers to a memory location or a register. Thus, for register indirect address, EA = (R) The advantages and limitations of register indirect addressing are basically the same as for indirect addressing. In both cases, the address space limitation (limited range of addresses) of the address field is overcome by having that field refer to a word- length location containing an address. In addition, register indirect addressing uses one less memory reference than indirect addressing.
- #14 A very powerful mode of addressing combines the capabilities of direct addressing and register indirect addressing. It is known by a variety of names depending on the context of its use, but the basic mechanism is the same. We will refer to this as displacement addressing: EA = A + ( R ) Displacement addressing requires that the instruction have two address fields, at least one of which is explicit. The value contained in one address field (value = A) is used directly. The other address field, or an implicit reference based on opcode, refers to a register whose contents are added to A to produce the effective address. We will describe three of the most common uses of displacement addressing: • Relative addressing • Base-register addressing • Indexing
- #16 For relative addressing, also called PC-relative addressing, the implicitly referenced register is the program counter (PC). That is, the next instruction address is added to the address field to produce the EA. Typically, the address field is treated as a twos complement number for this operation. Thus, the effective address is a displacement relative to the address of the instruction. Relative addressing exploits the concept of locality that was discussed in Chapters 4 and 8. If most memory references are relatively near to the instruction being executed, then the use of relative addressing saves address bits in the instruction.
- #18 For base-register addressing, the interpretation is the following: The referenced register contains a main memory address, and the address field contains a displacement (usually an unsigned integer representation) from that address. The register reference may be explicit or implicit. Base-register addressing also exploits the locality of memory references. It is a convenient means of implementing segmentation, which was discussed in Chapter 8. In some implementations, a single segment-base register is employed and is used implicitly. In others, the programmer may choose a register to hold the base address of a segment, and the instruction must reference it explicitly. In this latter case, if the length of the address field is K and the number of possible registers is N, then one instruction can reference any one of N areas of 2K words.
- #19 For indexing, the interpretation is typically the following: The address field references a main memory address, and the referenced register contains a positive displacement from that address. Note that this usage is just the opposite of the interpretation for base-register addressing. Of course, it is more than just a matter of user interpretation. Because the address field is considered to be a memory address in indexing, it generally contains more bits than an address field in a comparable base-register instruction. Also, we shall see that there are some refinements to indexing that would not be as useful in the base-register context. Nevertheless, the method of calculating the EA is the same for both base-register addressing and indexing, and in both cases the register reference is sometimes explicit and sometimes implicit (for different processor types). An important use of indexing is to provide an efficient mechanism for per- forming iterative operations. Consider, for example, a list of numbers stored starting at location A. Suppose that we would like to add 1 to each element on the list. We need to fetch each value, add 1 to it, and store it back. The sequence of effective addresses that we need is A, A + 1, A + 2,..., up to the last location on the list. With indexing, this is easily done. The value A is stored in the instruction’s address field, and the chosen register, called an index register, is initialized to 0. After each operation, the index register is incremented by 1. Because index registers are commonly used for such iterative tasks, it is typical that there is a need to increment or decrement the index register after each reference to it. Because this is such a common operation, some systems will automatically do this as part of the same instruction cycle. This is known as autoindexing. If certain registers are devoted exclusively to indexing, then autoindexing can be invoked implicitly and automatically. If general-purpose registers are used, the autoindex operation may need to be signaled by a bit in the instruction. In some machines, both indirect addressing and indexing are provided, and it is possible to employ both in the same instruction. There are two possibilities: the indexing is performed either before or after the indirection. If indexing is performed after the indirection, it is termed postindexing. First, the contents of the address field are used to access a memory location containing a direct address. This address is then indexed by the register value. This technique is useful for accessing one of a number of blocks of data of a fixed format. For example, it was described in Chapter 8 that the operating system needs to employ a process control block for each process. The operations performed are the same regardless of which block is being manipulated. Thus, the addresses in the instructions that reference the block could point to a location (value = A) containing a variable pointer to the start of a process control block. The index register contains the displacement within the block. With preindexing, the indexing is performed before the indirection. An address is calculated as with simple indexing. In this case, however, the calculated address contains not the operand, but the address of the operand. An example of the use of this technique is to construct a multiway branch table. At a particular point in a program, there may be a branch to one of a number of locations depending on conditions. A table of addresses can be set up starting at location A. By indexing into this table, the required location can be found. Typically, an instruction set will not include both preindexing and postindexing.
- #21 The final addressing mode that we consider is stack addressing. As defined in Appendix O, a stack is a linear array of locations. It is sometimes referred to as a pushdown list or last-in-first-out queue. The stack is a reserved block of locations. Items are appended to the top of the stack so that, at any given time, the block is partially filled. Associated with the stack is a pointer whose value is the address of the top of the stack. Alternatively, the top two elements of the stack may be in processor registers, in which case the stack pointer references the third element of the stack. The stack pointer is maintained in a register. Thus, references to stack locations in memory are in fact register indirect addresses. The stack mode of addressing is a form of implied addressing. The machine instructions need not include a memory reference but implicitly operate on the top of the stack.