AMini Project SeminaronDSP DATAPATHM.Tech MicroelectronicsManipal Institute of  TechnologyBy:Abhishek TiwariB. Dhaval KumarK .Sravan KumarRajkumar Patidar
Introduction DatapathArchitecture of  DatapathDatapath in DSP ProcessorsModules using in DatapathModules Function
Problem Definition DSPsPerforms all key arithmetic operations in 1 cycle.
Hardware support for managing numeric fidelity:
Shifters
Guard bits
SaturationGPPsMultiplies often take >1 cycle
Shifts often take >1 cycle
Other operations  typically take multiple cyclesDataPath:A datapath is a collection of functional units, registers, buffers.Most central processing units consist of a datapath and a control unit.Processor has Two Main Units in its Architecture
General  Processor
DatapathSecond Main Part in Microprocessor.Contains Several Unit.It Referred  RTL Design.
Basic Architecture
A Simple DSP Processor
DSP Datapath
ModulesRegistersMACALUShifterTristate BufferControl Unit
RegistersStoring Multiple BitsRegister File Synchronized  by same Clock8 Bit Register, 16 Bit Register
Basic Register Circuit
Register File
4 x 8 Register File
Design SummaryWord Length: 8 bit, 16 bit
Input Registers 8 Bit
Modeling : Behavioral  Modeling
Used Generic Statement, If – Else Statement
ACC  Reg. is 16 bit.
A load control Signal for enabling Storing function.
A Clear for reset the stored value.
Functions on Falling Edge. Register’s Result
Multiply-Accumulate (MAC)What is MAC ?Multiplication followed by accumulation.Where is MAC Use ?Common operation in many digital systems, particularly those highly interconnected, like digital filters, neural networks, data quantizers, etc.What are the Features of MAC ?Multiplying two values ,then adding the result to the previously accumulated value, which must then be re-stored in the registers for future accumulations and Checking  for Overflow.
Basic MAC UnitTypes  of  Multiplier:1.Unsigned  Multiplier2. Signed  Multiplier
Design Summary MAC is 8-bit  A,B: 8 bit I/P Registers    			prod: 16 bit O/P Register2 Control Signals :- Start and StopOverflow Function, which might happen when the number of MAC operations is large.Signed Adder
Timing Diagram & Result
Arithmetic Logic Unit It consists of arithmetic and logic unit.Arithmetic Operation : Addition SubtractionLogical Operation : And,or,not etc..It performs the operations according to control signal givenIt is basic building block of microprocessor.
ALU  Architecture
Practical Modal
Design Summary ALU is 16-bit  A,B: 16 bit i/p reg    y: 16 bit o/p registerControl Signal is of 4-bitIt can support up to 16 different operations.There is a separate flag register for carry and borrow, parity and sign flag.Comparator is also included in this Alu design.ALU is working on falling edge clock.
Design Details:Addition	variable q : std_logic_vector(16 downto 0);	when "0000" => q := ('0'& a) + ('0'& b);              	y <= q(15 downto 0);	if ( q(16) = '1' ) then f(3) <= '1';    --carry flag	end if;	f(1) <= '0';                            --Sign flag is zero                                                            Cont………
Cont….Subtraction	variable q : std_logic_vector(16 downto 0);	when "0001" => q := ('0'& a) - ('0'& b);	y <= q(15 downto 0);	if ( q(16) = '1' ) then f(1) <= '1';  --sign flag 	end if;	f(3) <= '0';                              --Carry flag is zero
Cont…Parity and Zero flag	variable p,z : std_logic;	We are checking results separately for parity and zero flag for all the operations.Parity flag (even):	p := y(15) xor y(14)……..…xor y(0);	if ( p = '0') then f(2) <= '1';Zero flag:	z := y(15) or y(14)……..…or y(0);	if (z = '0') then f(0) <= '1';
Cont…Comparator	when "1110" =>     if(a>b)then y<="0000000000000100"; elsif(a<b)then y<="0000000000000010";elsif(a=b)then y<="0000000000000001";	f(3) <= '0';  	f(1) <= '0'; Here instead of extra resistor for comparator o/p, o/p resistery is used for comp o/pt to save one resister.At later stage we can use this results by using first 3 bit of o/p resister.
Cont…Other function	when “case" => y <= a “function” b;                       	f(3) <= '0';  	f(1) <= '0';Syntax  for functions other then addition, subtraction and comparator is like above.For these functions sign flag and zero flag is always zero.
Control Word for Different Functions1000 XNOR
1001 PassA
1010 Pass B
1011 NOT B
1100  Increment A
1101  Decrement B
1110  Compare A & B
1111  Reset o/p0000 Addition0001 Subtraction0010 AND0011 OR0100 NAND0101 NOR0110 NOT A0111 XOR

Dsp Datapath