Instruction set of 8085 Microprocessor By Er. Swapnil Kaware

INSTRUCTION SET OF 8085

Presented By,
Er. Swapnil Kaware,
svkaware@yahoo.co.in,
B.E.(Electronics).

BINARY TO DECIMAL NUMBER FORMAT
8 4 2 1 DECIMAL 8 4 2 1 DECIMAL

0 0 0 0 =0 1 0 0 0 =8

0 0 0 1 =1 1 0 0 1 =9

0 0 1 0 =2 1 0 1 0 = 10 = A

0 0 1 1 =3 1 0 1 1 = 11 = B

0 1 0 0 =4 1 1 0 0 = 12 = C

0 1 0 1 =5 1 1 0 1 = 13 = D

0 1 1 0 =6 1 1 1 0 = 14 = E

0 1 1 1 =7 1 1 1 1 = 15 = F

What is Instruction ?????
• An instruction is a binary pattern designed
inside a microprocessor to perform a specific
function.

• 8085 has 246 instructions.

• Each instruction is represented by an 8-bit
binary value.

Classification Of Instruction Set
• There are 5 Types,

• (1) Data Transfer Instruction,
• (2) Arithmetic Instructions,
• (3) Logical Instructions,
• (4) Branching Instructions,
• (5) Control Instructions,

(1) Data Transfer Instructions

• MOV Rd, Rs
• MOV M, Rs
• MOV Rd, M
• This instruction copies the contents of the
source register into the destination register.
• The contents of the source register are not
altered.
• Example: MOV B,A or MOV M,B or MOV C,M

BEFORE EXECUTION AFTER EXECUTION

A 20 B MOV B,A A 20 B 20

A F A F
B 30 C B 30 C
D E
MOV M,B D E
H 20 L 50 H 20 L 50 30

A F A F
B C B C 40
D E
MOV C,M
D E
H 20 L 50 40 H 20 L 50 40


• MVI R, Data(8-bit)
• MVI M, Data(8-bit)

• The 8-bit immediate data is stored in the
destination register (R) or memory (M), R is
general purpose 8 bit register such as
A,B,C,D,E,H and L.

• Example: MVI B, 60H or MVI M, 40H


A F A F
B C B 60 C
D E
MVI B,60H D E
H L H L


204FH 204FH

40
HL=2050H HL=2050H
MVI M,40H
2051H 2051H


• LDA 16-bit address

• The contents of a memory location, specified
by a 16-bit address in the operand, are
copied to the accumulator (A).
• The contents of the source are not altered.

• Example: LDA 2000H


A A 30

30 LDA 2000H 30
2000H 2000H


• LDAX Register Pair
• Load accumulator (A) with the contents of
memory location whose address is specified
by BC or DE or register pair.
• The contents of either the register pair or the
memory location are not altered.

• Example: LDAX D


A F A 80 F

B C 80 B C 80
2030H 2030H
LDAX D
D 20 E 30 D 20 E 30


• STA 16-bit address

• The contents of accumulator are copied into
the memory location i.e. address specified by
the operand in the instruction.

• Example: STA 2000 H


A 50 A 50

50
2000H STA 2000H 2000H


• STAX Register Pair

• Store the contents of accumulator (A) into
the memory location whose address is
specified by BC Or DE register pair.

• Example: STAX B


A 50 F A 50 F

B 10 C 20 B 10 C 20 50
1020H 1020H

D E
STAX B D E


• SHLD 16-bit address

• Store H-L register pair in memory.
• The contents of register L are stored into
memory location specified by the 16-bit
address.
• The contents of register H are stored into the
next memory location.

• Example: SHLD 2500 H


H 30 L 60 H 30 L 60

60
204FH 204FH

30
2500H SHLD 2500H 2500H

2502H 2502H


• XCHG

• The contents of register H are exchanged
with the contents of register D.
• The contents of register L are exchanged with
the contents of register E.

• Example: XCHG


D 20 E 40 D 70 E 80

H 70 L 80 XCHG H 20 L 40


• SPHL

• Move data from H-L pair to the Stack Pointer
(SP)
• This instruction loads the contents of H-L pair
into SP.

• Example: SPHL

BEFORE EXECUTION

SP
H 25 L 00

SPHL

AFTER EXECUTION

SP 2500
H 25 L 00


• XTHL
• Exchange H–L with top of stack
• The contents of L register are exchanged with
the location pointed out by the contents of
the SP.
• The contents of H register are exchanged
with the next location (SP + 1).

• Example: XTHL

L=SP
H=(SP+1)


SP 2700 50 SP 2700 40
2700H 2700H
H L H L
30 40 60 60 50 30
2701H 2701H
XTHL
2702H 2702H


• PCHL

• Load program counter with H-L contents
• The contents of registers H and L are copied into
the program counter (PC).
• The contents of H are placed as the high-order
byte and the contents of L as the low-order byte.

• Example: PCHL


PC PC 6000

H
60
L
00
PCHL H
60
L
00


• IN 8-bit port address

• Copy data to accumulator from a port with 8-
bit address.
• The contents of I/O port are copied into
accumulator.

• Example: IN 80 H

BEFORE EXECUTION

PORT 80H 10 A

IN 80H

AFTER EXECUTION

PORT 80H 10 A 10


• OUT 8-bit port address

• Copy data from accumulator to a port with 8-
bit address
• The contents of accumulator are copied into
the I/O port.

• Example: OUT 50 H

BEFORE EXECUTION

PORT 50H 10 A 40

OUT 50H

AFTER EXECUTION

PORT 50H 40 A 40

Arithematic Instructions
• These instructions perform the operations
like:

• Addition
• Subtraction
• Increment
• Decrement

(1) Arithematic Instructions

• ADD R
• ADD M
• The contents of register or memory are added to
the contents of accumulator.
• The result is stored in accumulator.
• If the operand is memory location, its address is
specified by H-L pair.

• Example: ADD C or ADD M


A 20 A 50

B C 30 B C 30
D E ADD C D E
H L
H L
A=A+R


A 20 ADD M A 30
B C B C
D E
A=A+M D E
H 20 L 50 10 H 20 L 50 10

2050 2050


• ADC R
• ADC M
• The contents of register or memory and Carry Flag
(CY) are added to the contents of accumulator.
specified by H-L pair. All flags are modified to reflect
the result of the addition.

• Example: ADC C or ADC M


CY 1 CY 0

A 50 A 71
B C 20 B C 20
ADC C
D E D E
A=A+R+CY
H L H L


CY 1 CY 0
2050H 30 ADC M 2050H 30
A 20 A 51
A=A+M+CY
H 20 L 50 H 20 L 50


• ADI 8-bit data

• The 8-bit data is added to the contents of
accumulator.

• Example: ADI 10 H


A 50 A 60

ADI 10H
A=A+DATA(8)


• ACI 8-bit data

• The 8-bit data and the Carry Flag (CY) are
added to the contents of accumulator.

• Example: ACI 20 H


CY 1 ACI 20H CY 0

A 30
A=A+DATA A 51

(8)+CY


• DAD Register pair
• The 16-bit contents of the register pair are
added to the contents of H-L pair.
• The result is stored in H-L pair.
• If the result is larger than 16 bits, then CY is
set.

• Example: DAD D


CY 0 CY 0

SP SP
B
D 10
C
E 20
DAD D B
D 10
C
E 20
H 20 L 50 HL=HL+R H 30 L 70


• SUB R
• SUB M
• The contents of the register or memory location are
subtracted from the contents of the accumulator.
specified by H-L pair.

• Example: SUB B or SUB M


A 50 A 20
B 30 C B 30 C
D E
SUB B D E
H L A=A-R H L


10
A 50 1020H A 40 1020H 10

H L
SUB M H L
10 20
A=A-M 10 20


• SBB R
• SBB M
• The contents of the register or memory location and
Borrow Flag (i.e.CY) are subtracted from the contents of the
accumulator.
• If the operand is memory location, its address is specified
by H-L pair.

• Example: SBB C or SBB M


CY 1 CY 0

A 40 A 19
B C 20
SBB C B C 20
D E A=A-R-CY D E
H L H L


CY 1 CY 0
10 10
A 50 2050H A 39 2050H
SBB M
H L H L
20 50 A=A-M-CY 20 50


• SUI 8-bit data

• OPERATION: A=A-DATA(8)
• The 8-bit immediate data is subtracted from
the contents of the accumulator.

• Example: SUI 45 H


• SBI 8-bit data
• The 8-bit data and the Borrow Flag (i.e. CY) is
subtracted from the contents of the
accumulator.

• Example: SBI 20 H


CY 1 CY 0

A 50
SBI 20H A 29
A=A-DATA(8)-CY


• INR R
• INR M
• The contents of register or memory location are
incremented by 1.
• The result is stored in the same place.
• If the operand is a memory location, its address
is specified by the contents of H-L pair.

• Example: INR B or INR M


A A
B 10 C INR B B 11 C
D
H
E
L
R=R+1 D
H
E
L


H L 30 H L 31
2050H 2050H
20 50
INR M 20 50

M=M+1


• INX Rp

• The contents of register pair are incremented
by 1.

• Example: INX H


SP SP

B C B C
D E INX H D E
H 10 L 20 H 11 L 21
RP=RP+1


• DCR R
• DCR M

• The contents of register or memory location are
decremented by 1.
• If the operand is a memory location, its address
is specified by the contents of H-L pair.
• Example: DCR E or DCR M


A A
B C B C
D E 20
DCR E D E 19
H L R=R-1 H L


H L
H L 21 20
20 50 2050H
2050H
20 50 DCR M
M=M-1


• DCX Rp

• The contents of register pair are decremented by
1.

• Example: DCX D


SP SP

B C B C
D 10 E 20 DCX D D 10 E 19
H L H L
RP=RP-1

(1) Logical Instructions

• ANA R
• ANA M

• AND specified data in register or memory with
accumulator.
• Store the result in accumulator (A).

• Example: ANA B, ANA M

BEFORE EXECUTION 1010 1010=AAH AFTER EXECUTION
0000 1111=0FH
CY AC CY 0 AC 1
0000 1010=0AH
A AA A 0A
B 10
0F C ANA B B 0F C
D E A=A and R D E
H L H L


0101 0101=55H
CY AC 1011 0011=B3H CY 0 AC 1

B3 0001 0001=11H B3
A 55 2050H A 11 2050H

H 20 L 50 ANA M H 20 L 50
A=A and M


• ANI 8-bit data

• AND 8-bit data with accumulator (A).
• Store the result in accumulator (A)

• Example: ANI 3FH


1011 0011=B3H
0011 1111=3FH

0011 0011=33H

CY AC CY 0 AC 1
ANI 3FH
A B3 A=A and DATA(8) A 33


• XRA Register (8-bit)

• XOR specified register with accumulator.
• Store the result in accumulator.

• Example: XRA C

1010 1010=AAH
BEFORE EXECUTION 0010 1101=2DH AFTER EXECUTION

1000 0111=87H

CY AC CY 0 AC 0

A AA A 87
B 10 C 2D B C 2D
D E
XRA C D E
H L A=A xor R H L


• XRA M

• XOR data in memory (memory location
pointed by H-L pair) with Accumulator.
• Store the result in Accumulator.

• Example: XRA M

0101 0101=55H
BEFORE EXECUTION 1011 0011=B3H AFTER EXECUTION
1110 0110=E6H

CY AC CY 0 AC 0
B3 XRA M B3
2050H A E6 2050H
A 55
A=A xor M
H 20 L 50 H 20 L 50


• XRI 8-bit data

• XOR 8-bit immediate data with accumulator (A).

• Example: XRI 39H

1011 0011=B3H
0011 1001=39H

BEFORE EXECUTION 1000 1010=8AH AFTER EXECUTION

CY AC CY 0 AC 0
XRI 39H
A B3 A=A xor DATA(8) A 8A


• ORA Register

• OR specified register with accumulator (A).

• Example: ORA B

1010 1010=AAH
0001 0010=12H
1011 1010=BAH

CY AC CY 0 AC 0

ORA B
A=A or R

A AA A BA
B 12 C B 12 C
D E D E
H L H L


• ORA M

• OR specified register with accumulator (A).

• Example: ORA M

0101 0101=55H
1011 0011=B3H
1111 0111=F7H

CY AC CY 0 AC 0

ORA M
A=A or M
B3 B3
A 55 2050H A F7 2050H
H 20 L 50 H 20 L 50


• ORI 8-bit data

• OR 8-bit data with accumulator (A).

• Example: ORI 08H

1011 0011=B3H
0000 1000=08H

BEFORE EXECUTION 1011 1011=BBH AFTER EXECUTION

CY AC CY 0 AC 0
ORI 08H
A B3 A=A or DATA(8) A BB


• CMP Register
• CMP M

• Compare specified data in register or memory
with accumulator (A).

• Example: CMP D or CMP M

BEFORE EXECUTION A>R: CY=0,Z=0 AFTER EXECUTION
A=R: CY=0,Z=1
CY Z A<R: CY=1,Z=0 CY 0 Z 0

A B8 A B8
B 10 C CMP D B C
D B9 E A-R D B9 E
H L H L

A>M: CY=0,Z=0
A=M: CY=0,Z=1
A<M: CY=1,Z=0
CY Z CY 0 Z 1

B8 B8
A B8 2050H A B8 2050H
CMP M
H 20 L 50 A-M H 20 L 50


• CPI 8-bit data

• Compare 8-bit immediate data with
accumulator (A).

• Example: CPI 30H

A>DATA: CY=0,Z=0
A=DATA: CY=0,Z=1
BEFORE EXECUTION A<DATA: CY=1,Z=0 AFTER EXECUTION

CY Z CY 0 AC 0
CPI 30H
A BA
A-DATA A BA

1011 1010=BAH


• STC

• It sets the carry flag to 1.
• Example: STC


CY 0 CY 1
STC
CY=1


• CMC

• It complements the carry flag.
• Example: CMC


CY 1 CY 0
CMC


• CMA

• It complements each bit of the accumulator.
• Example: CMA


• RLC
• Rotate accumulator left
• Each binary bit of the accumulator is rotated left
by one position.
• Bit D7 is placed in the position of D0 as well as
in the Carry flag.
• CY is modified according to bit D7.

• Example: RLC.

BEFORE EXECUTION

CY B7 B6 B5 B4 B3 B2 B1 B0

AFTER EXECUTION

B7 B6 B5 B4 B3 B2 B1 B0 B7


• RRC
• Rotate accumulator right
• Each binary bit of the accumulator is rotated right by
one
• position.
• Bit D0 is placed in the position of D7 as well as in the
Carry flag.

• Example: RRC.

BEFORE EXECUTION

B7 B6 B5 B4 B3 B2 B1 B0 CY

AFTER EXECUTION

B0 B7 B6 B5 B4 B3 B2 B1 B0


• RAL
• Rotate accumulator left through carry
by one position through the Carry flag.
• Bit D7 is placed in the Carry flag, and the Carry
flag is placed in the least significant position D0.

• Example: RAL.

BEFORE EXECUTION

CY B7 B6 B5 B4 B3 B2 B1 B0

AFTER EXECUTION

B7 B6 B5 B4 B3 B2 B1 B0 CY


• RAR
• Rotate accumulator right through carry
by one position through the Carry flag.
• Bit D7 is placed in the Carry flag, and the Carry
flag is placed in the least significant position D0.

• Example: RAR

BEFORE EXECUTION

B7 B6 B5 B4 B3 B2 B1 B0 CY

AFTER EXECUTION

CY B7 B6 B5 B4 B3 B2 B1 B0

Concept of Subroutine
• In 8085 microprocessor a subroutine is a
separate program written aside from main
program ,this program is basically the
program which requires to be executed
several times in the main program.
• The microprocessor can call subroutine any
time using CALL instruction. after the
subroutine is executed the subroutine hands
over the program to main program using RET
instruction.

Branching Instructions

• The branch group instructions allows the
microprocessor to change the sequence of
program either conditionally or under certain
test conditions. The group includes,
• (1) Jump instructions,
• (2) Call and Return instructions,
• (3) Restart instructions,

(1) Branching Instructions
• JUMP ADDRESS
• BEFORE EXECUTION AFTER EXECUTION
PC JMP 2000H PC 2000

• Jump unconditionally to the address.
• The instruction loads the PC with the address
given within the instruction and resumes the
program execution from specified location.
• Example: JMP 200H

Conditional Jumps
Instruction Code Decription Condition For Jump

JC Jump on carry CY=1

JNC Jump on not carry CY=0

JP Jump on positive S=0

JM Jump on minus S=1

JPE Jump on parity even P=1

JPO Jump on parity odd P=0

JZ Jump on zero Z=1

JNZ Jump on not zero Z=0

• CALL address

• Call unconditionally a subroutine whose
starting address given within the
instruction and used to transfer program
control to a subprogram or subroutine.

• Example: CALL 2000H

Conditional Calls
Instruction Code Description Condition for CALL

CC Call on carry CY=1

CNC Call on not carry CY=0

CP Call on positive S=0

CM Call on minus S=1

CPE Call on parity even P=1

CPO Call on parity odd P=0

CZ Call on zero Z=1

CNZ Call on not zero Z=0


• RET

• Return from the subroutine unconditionally.
• This instruction takes return address from the
stack and loads the program counter with
this address.

• Example: RET


SP 27FD 00 SP 27FF 00
27FDH 27FDH
PC PC 6200
27FEH 62 27FEH 62
RET
27FFH 27FFH

• RST n
• Restart n (0 to 7)
• This instruction transfers the program control
to a specific memory address. The processor
multiplies the RST number by 8 to calculate
the vector address.

• Example: RST 6


SP-1

SP 3000 SP 2999 01
2FFEH 2FFEH
PC 2000 PC 0030
2FFFH 20
RST 6 2FFFH

3000H 3000H

ADDRESS OF THE NEXT INSTRUCTION IS 2001H

Vector Address For Return
Instructions
Instruction Code Vector Address

RST 0 0*8=0000H

RST 1 0*8=0008H

RST 2 0*8=0010H

RST 3 0*8=0018H

RST 4 0*8=0020H

RST 5 0*8=0028H

RST 6 0*8=0030H

Rst 7 0*8=0038H

(1) Control Instructions
• NOP

• No operation
• No operation is performed.
• The instruction is fetched and decoded but no
operation is executed.

• Example: NOP

• HLT

• Halt
• The CPU finishes executing the current
instruction and halts any further execution.
• An interrupt or reset is necessary to exit from
the halt state.

• Example: HLT

• RIM

• Read Interrupt Mask
• This is a multipurpose instruction used to read the
status of interrupts 7.5, 6.5, 5.5 and read serial data
input bit.
• The instruction loads eight bits in the accumulator
with the following interpretations.

• Example: RIM

• SIM

• Set Interrupt Mask
• This is a multipurpose instruction and used to
implement the 8085 interrupts 7.5, 6.5, 5.5, and
serial data output.
• The instruction interprets the accumulator
contents as follows.

• Example: SIM

Instruction set of 8085 Microprocessor By Er. Swapnil Kaware

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