sboa508.pdf

Application Note
Amplifier Input Common-Mode and Output-Swing
Limitations
Vladimir Ilic, Daniel Terrazas, Marek Lis Precision Amplifiers
ABSTRACT
This application note explains the cause of amplifier input and output limitations, focusing mainly on CMOS input
and output stage topologies. We also discuss common design pitfalls associated with input and output range
limitations, and offer simple solutions which can be implemented to resolve situations where an amplifier is taken
outside of its linear operating range.
Table of Contents
1 Single N-FET or P-FET vs Complimentary N-P-FET Input Stage Limitations................................................................... 2
2 Example 1: Output Swing Limitation from VCM in an Op-Amp for Low Side Current Sense...........................................5
3 Bipolar and CMOS Output Stage Topologies and Output Swing Limitations...................................................................6
4 Example 2: Output Swing Limitations With Instrumentation Amplifiers...........................................................................8
5 Summary................................................................................................................................................................................. 9
6 References............................................................................................................................................................................ 10
List of Figures
Figure 1-1. Simplified Representation of an N-Channel MOSFET Input Stage...........................................................................2
Figure 1-2. Simplified Representation of a Complementary N-P-FET Input Stage..................................................................... 3
Figure 3-1. Common Output Stage Topologies........................................................................................................................... 7
List of Tables
Table 5-1. New Device Recommendations..................................................................................................................................9
Trademarks
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www.ti.com Table of Contents
SBOA508 – JANUARY 2022
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Amplifier Input Common-Mode and Output-Swing Limitations 1
Copyright © 2022 Texas Instruments Incorporated

1 Single N-FET or P-FET vs Complimentary N-P-FET Input Stage Limitations
The common-mode voltage range of an amplifier is the range of usable input voltages allowing for linear
operation. Depending on the input stage topology, amplifiers may have common mode input range (VCM)
which may be limited relative to one or both supply rails; best case scenario is achieved when input voltage
range extends slightly beyond both supply rails (rail-to-rail operation). Limitations in the VCM range come from
operating voltages needed to bias the transistors in the input stage, and to ensure operation within a linear
range (saturation range for MOSFET or active range for bipolar transistors). We’ll illustrate these limitations for
MOSFET amplifier input stages. Figure 1-1 shows a simplified representation of an N-channel MOSFET input
stage. The stage consists of a current source (single NMOS, Q3, shown for simplicity), a differential pair with
input voltage applied to the gate of each transistor, and an active load PMOS current mirror, Q4 and Q5. The
NMOS differential pair has an input common mode voltage limitation with respect to the negative rail, –Vs.
Performing Kirchhoff’s voltage walk from –Vs to Vin+, we have:
Vin± (min) = –Vs + Vsat(Q3) + Vgs(Q1,Q2) (1)
Vin± (min) = –Vs + 0.1 V + 0.9 V
Vin± (min) = –Vs + 1 V
Therefore, the N-channel MOSFET VCM range is limited to -Vs by a certain voltage as detailed in Equation 1.
Note that we make some important assumptions, namely that Vsat of both NMOS and PMOS transistors are
perfectly matched and equal to 0.1V (a typical value). Similarly, we assume that Vgs for both NMOS and PMOS
transistors are equal and have a value of 0.9V, a typical value to turn on the transistors. With these assumptions
in mind, we can say that this simplified NMOS input stage allows input common mode voltage range operation
about 1 V from Vs. Performing Kirchhoff’s walk from the opposite end, +Vs to Vin±, we get:
Vin± (max) = +Vs – Vds(Q5,Q4) – Vds(Q1,Q2) + Vgs(Q1,Q2) (2)
Vin± (max) = +Vs - Vgs(Q4,Q5) – Vsat(Q1,Q2) + Vgs(Q1,Q2)
Vin± (max) = +Vs – 0.9 V - 0.1 V+ 0.9 V
Vin± (max) = +Vs – 0.1 V
+VS
+VOUT
-VS
Q3
Q1 Q2
Q5
Q4
VIN-
VIN+
Figure 1-1. Simplified Representation of an N-Channel MOSFET Input Stage
Given that Vgs typically exceeds Vds for a MOSFET at the edge saturation (Vsat at a minimum, Vgs at a
maximum), the maximum VCM comes within Vsat, or 100 mV, of the positive rail, +Vs.
Single N-FET or P-FET vs Complimentary N-P-FET Input Stage Limitations www.ti.com
2 Amplifier Input Common-Mode and Output-Swing Limitations SBOA508 – JANUARY 2022

Conversely, the P-channel MOSFET input stage is limited on the positive side, usually on the order of 1 V from
positive rail, +Vs. On the negative side, the common mode voltage range of a P-MOSFET can come within Vsata,
or 100 mV from the negative rail,-Vs.
To avoid the limitations of the single differential pair input stage, a complimentary N-channel and P-channel
MOSFET (CMOS) input stage design can be used. This design uses two input differential pairs (an N-channel
MOSFET pair and a P-channel MOSFET pair), a current steering scheme, and a double-folded cacose summing
the two input signals (Figure 1-2). Vset is a voltage source used to control the functionality of the diverting
transistor Q8. For common mode voltage below +Vs – Vset, Q8 is off, and the drain current (Id) from Q5 (current
source) flows straight through the P-channel differential pair (Q1 and Q2). The double-folded cascode allows the
drains of Q1 and Q2 to be biased down to Vsat above – Vs, resulting in VCM swing below the negative rail. This
allows the VCM to extend a certain voltage, ΔVP, below the negative rail. Similarly, for common mode voltage
above +Vs – Vset Q8 is on, and Id is steered from the P-channel pair to the N-channel pair via the current mirror
(Q6 and Q7). The VCM range can therefore exceed the positive rail, +Vs, by a certain voltage, ΔVN. To sum it up,
this gives an op-amp with this input stage topology a rail-to-rail VCM range as detailed in Equation 3.
+ Vs + ΔVN > VCM > – Vs – ΔVP (3)
Id
Id/2
Id/2 Id/2
Id
P-Channel
N-Channel
VIN+
-VS
+VS
VIN-
Id
Q5
Q8
Q1
Q2
Q6 Q7
Q3 Q4
VSET
Id/2
COMPLEMENTARY INPUT STAGE SECOND STAGE
Vb1
Vb3
Vb4
Vb2
Vb5
Q9 Q10
Q11 Q12
Figure 1-2. Simplified Representation of a Complementary N-P-FET Input Stage
Now that we understand the rail-to-rail operation of a complementary input stage, we more elaborately address
ΔVN and ΔVP. Looking deeper into the complementary input stage amplifier in Figure 1-2, we can see that the
rail-to-rail input performance is dependent on the second stage. Using Kirchhoff’s voltage law from the positive
rail down to the input, similar to the one performed previously on Figure 1-1.
Vin± (max) = +Vs – Vsat(Q9,Q10) – Vds(Q3,Q4) + Vgs(Q3,Q4) (4)
Vin± (max) = +Vs – 0.1 V – 0.1 V + 0.9 V
Vin± (max) = +Vs + 0.7 V
www.ti.com Single N-FET or P-FET vs Complimentary N-P-FET Input Stage Limitations

We can see from Equation 4 above that the complimentary input stage amplifier has input common mode
range 0.7 V above the positive rail. We can find the common mode input voltage range to the negative rail by
performing the same procedure.
Vin± (min) = – Vs + Vsat(Q11,Q12) + Vsat(Q1,Q2) – Vgs(Q1,Q2) (5)
Vin± (min) = – Vs + 0.1 V + 0.1 V – 0.9 V
Vin± (min) = – Vs – 0.7 V
From Equation 4 and Equation 5 we find that the common mode input voltage range extends beyond the positive
and negative rail typically by about 0.7 V, which is represented by the aforementioned terms ΔVN and ΔVP.
In data sheets, you will notice that most rail-to-rail amplifiers are specified up to 0.1 V (not 0.7 V) beyond the
supplies. This is due to the protection diodes between the input and each rail.
Single N-FET or P-FET vs Complimentary N-P-FET Input Stage Limitations www.ti.com

2 Example 1: Output Swing Limitation from VCM in an Op-Amp for Low Side Current
Sense
As an example, let’s assume that we are working with OPA391 operational amplifier, which we have in a gain of
100 V/V, powered with a 5.0-V single supply. Let's say we want to measure current between 0 and 50 A, and we
choose a 1-mΩ shunt resistor. This means we will see differential input in the range of 0 to 50 A × 1 mΩ = 50
mV. The minimum VCM value for OPA391 is 0.1V below ground, so our input conditions are in agreement with
the data sheet requirements. However, OPA391 AOL output conditions are specified in the range of –Vs + 0.1 V <
Vout < +Vs – 0.1 V. Therefore, between 0 and 0.1 V and 4.9 V to 5 V of output the op-amp may encounter some
non-linearity, which is undesirable. We can solve the issue quite easily:
• We can level-shift the input common mode up by 1 mV (which is amplified by the closed loop gain), or level
shift -Vs down by 100 mV. Level shifting the input can be achieved through a simple voltage divider circuit,
or providing headroom for the output can be accomplished by providing a small negative rail. If no negative
rail is present in the system, a negative charge pump like the LM7705 solves that problem in a single IC. In
either case, it will put Vout at least 100 mV above –Vs under 0 current condition, which resolves the output
swing issue on the low end. Take note that either solution also exceeds the maximum linear operating range
on the high end, which is in violation of the output voltage swing specifications. We can solve that issue by
decreasing the gain of the circuit or the value of the shunt resistor slightly to bring Vout (max) at or below +Vs –
100 mV.
While the complementary input stage described offers an excellent solution to the input common mode problem,
it is important to keep in mind that the transition between each pair will generate a change in the input offset
voltage of the amplifier, also known as input crossover distortion. The transition can be eliminated by keeping
both pairs conducting at all times, but this is often avoided because of the excessive power dissipation required.
The input crossover distortion can be circumvented more elegantly by using a zero-crossover amplifier (Zero-
crossover Amplifiers: Features and Benefits tech note). These amplifiers use a single transistor pair and an
integrated charge pump to push the internal voltage supply enough beyond the nominal value to remain in linear
operation.
www.ti.com Example 1: Output Swing Limitation from VCM in an Op-Amp for Low Side Current Sense

3 Bipolar and CMOS Output Stage Topologies and Output Swing Limitations
The output swing range of an amplifier is the range of output voltages allowing for linear amplifier operation. As
with VCM, the output swing (Vout) limitations are related to operating voltages of transistors in the output stage.
Depending on the application and topology, Vout may be more or less limited relative to the rails, regardless
whether they are single, dual, or asymmetric. Perfect rail-to-rail performance does not exist in practice, although
some of the complimentary MOSFET designs come fairly close.
Many applications require Vout swing to only one rail, typically the negative rail. The earliest op-amp output
stages accomplished this by having an NPN emitter-follower configuration with a resistive pull-down (Figure
3-1 A). A pull-down resistor to the negative rail allows the output to approach the negative rail, but this greatly
limits the sinking current and results in slow output response. A similar design (bipolar or MOSFET) utilized
NPN/NMOS current sources in place of the pull-down resistor, offering higher gain and near to-negative-rail
output swing (Figure 3-1 B).
With the advent of modern complimentary bipolar processes, better matched, high speed PNP and NPN
transistors became available. As a result, the complimentary emitter-follower output stage (Figure 3-1 C) was
developed with its most significant advantage being low output impedance. The major drawback of this topology
is its limited output swing, typically on the order of 1V or more to the rail due to transistor operating voltages
in the stage. Specifically, the minimal forward-bias voltage across the PNP current source (VFB-P), and the
base-emitter voltage (VBE-N) limit swing to positive rail, whereas the VFB-N of the NPN current source and the
VBE-P limit swing to negative rail. Full output voltage swing of the complimentary bipolar output stage is thus:
+Vs - Vsat (npn) - Vbe (pnp) > Vout > -Vs + Vsat (pnp) + Vbe (npn) (6)
More recent complimentary common-emitter or common-source output stages (Figure 3-1 D and Figure 3-1 E),
allow the op-amp output swing much closer to rail, but both of these stages have fairly high output impedance.
For the bipolar version of this stage, the output swing limitation to each rail comes from Vce, (sat), or the minimal
collector-emitter voltage needed to keep each transistor operating in the linear region. The typical Vsat for a
bipolar transistor is 300mV at 25ºC and changes by roughly -2mV per each ºC increase in temperature.
-Vs + Vsat < Vout < +Vs - Vsat (7)
We can perform a similar analysis to the MOSFET version of this stage, illustrated in Figure 3-1 (E). The output
swing limitation comes from the MOSFET on-resistance (Ron) while in the triode region, which causes an output
voltage range limitation relative to the rail equal to Id × Ron. In essence, in the non-linear operating region,
the MOSFET acts as a small resistor and produces a voltage drop. Under unloaded conditions, Id = Iq, the
limitation caused by the voltage drop is on the order of 5 mV to 50mV, which is considered almost truly rail-to rail
performance.
-Vs + Id x Ron > Vout > +Vs + Id x Ron (8)
Keep in mind, that under normal operation Id is equal to the quiescent current of the output transistors, Iq, plus
the load current. In other words, the output swing will decrease as the load current increases. A plot illustrating
this effect is included in data sheets – look for the output voltage swing vs output current plot (often known as a
claw curve). Operate within the range of the curves to remain in linear operation
Bipolar and CMOS Output Stage Topologies and Output Swing Limitations www.ti.com

P-FET
N-FET
-Vs
+Vs
VOUT
VOUT
+Vs
-Vs
+Vs
-Vs
VOUT
R
+Vs
-Vs
VOUT
PNP
NPN
NPN
VOUT
PNP
(A) (B) (C) (D) (E)
-Vs
+Vs
N-FET
N-FET
NPN
R
R
R
Figure 3-1. Common Output Stage Topologies
www.ti.com Bipolar and CMOS Output Stage Topologies and Output Swing Limitations

4 Example 2: Output Swing Limitations With Instrumentation Amplifiers
Let’s go back to our current shunt example, but this time the INA326 device is used in a gain of 100 V/V, and
we power with a 5-V supply. Let's say we want to measure current between 1 A and 50 A, and we choose a
1mΩ shunt resistor. This means we will see a minimum of 1 A × 1 mΩ × 100 V/V = 100 mV on the output. The
swing-to-GND of the INA326 is -VS + 0.02 V, so an expected minimum output of 100 mV is acceptable. However,
at 50 A current, the output voltage would be 50 A × 1mΩ × 100V/V = 5 V. The swing to rail spec is +VS – 75mV,
worst case, and 5 V exceeds that.
So, what we can do to improve the circuit?
1. Increase supply by at least 75 mV over 5 V (thus, increasing the output swing of the amplifier). This isn't
usually an option in designs as power supplies are generally fixed at common values like 1.8 V, 2.5 V, 3.3
V, 5 V, and so forth. Also, the variation (minimum) of the supply needs to be considered, and has to always
exceed 5.075 V to ensure linear operation.
2. Lower the gain. Setting a lower gain value would result in a lower maximum expected output voltage,
keeping the amplifier within the linear mode of operation, at the expense of lower measurement resolution.
3. Choose a smaller shunt resistor. Reducing the value of the shunt resistor will decrease input signal and
subsequently the output signal. Switching from 1 mΩ to 0.5 mΩ would keep the output well within the
permissible range, at the expense of measurement resolution.
4. Choose a different amplifier with more suitable supply voltage specifications. For instance, the INA823 has a
swing-to-positive supply spec of +VS – 150 mV, thus switching from the INA326 to the INA823 by itself would
not resolve the output swing issue. However, the INA823 can support power supply voltages up to 36 V, so
if the supply voltage was increased to the next higher available rail, this would ensure output remains within
the linear range of the amplifier (this solution is applicable to op-amps as well).
Example 2: Output Swing Limitations With Instrumentation Amplifiers www.ti.com

5 Summary
In board-level design, it is important to recognize amplifier input and output stage limitations. Different amplifier
input and output stage topologies offer different operating common mode voltage and output swing voltage
ranges, respectively. Single supply mode of operation sometimes offers challenges with respect to keeping VCM
within the linear operating range on the low end. Choosing a device with VCM range extending below ground
or using a negative charge pump to lower the negative supply below ground can help resolve such issues.
Conversely, having an expected output voltage value beyond the data sheet output swing specified limits will
degrade output accuracy and should be avoided. If selecting an amplifier with a closer to-rail output swing is not
an option, then parameters such as the gain of the circuit and supply voltage range can be adjusted to overcome
output swing limitations.
Table 5-1. New Device Recommendations
Device Description
OPA391 Micro-power (24 μA), ultra-low bias (0.8 pA), e-Trim™ rail-to-rail op-amp
OPA392 Wide-bandwidth (13 MHz), ultra-low bias (0.8 pA), precision (10 μV), e-Trim™ rail-to-rail op amp
OPA3S328 Wide bandwidth (40 MHz), low bias (10 pA), zero-crossover dual op amp with integrated switches in a tiny package
INA819 Low power (350 μA), low noise (8 nV/√Hz), precision (35 μV), 36-V super-beta input instrumentation amplifier available in
tiny package
Low power (350 µA), precision instrumentation amp with ±60-V overvoltage protection (gain pins 2, 3)
INA849 Low power (350 μA), low noise (8 nV/√Hz), precision (35 μV), 36-V super-beta input instrumentation amplifier with +/-60V
overvoltage protection available in tiny package
INA823 Low power (180μA), precision (100μV), wide supply range (2.7-36 V) instrumentation amplifier with below ground input
range (150 mV) and +/-60V overvoltage protection
www.ti.com Summary

6 References
• Texas Instruments, Op amps with complementary-pair input stages: What are the design trade-offs? Analog
Design Journal
• Texas Instruments, Linear operating region of two-op-amp instrumentation amplifiers with gain stages Analog
Design Journal
• Texas Instruments, Measuring the linear operating region of instrumentation amplifiers Analog Design Journal
• Instrumentation amplifier VCM vs. VOUT plots: Part 1
References www.ti.com

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