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authorJohn Naylor2022-08-29 06:40:53 +0000
committerJohn Naylor2022-08-29 07:20:09 +0000
commitf8f19f70868c6351b80f02a47fa65d56b728a5a2 (patch)
treea18a0af6460e1ae3db7152687159c0a22b3091e5 /src/include/port/simd.h
parentc6e0fe1f2a08505544c410f613839664eea9eb21 (diff)
Abstract some more architecture-specific details away from SIMD functionality
Add a typedef to represent vectors containing four 32-bit integers, and add functions operating on them. Also separate out saturating subtraction into its own function. The motivation for this is to prepare for a future commit to add ARM NEON support. Nathan Bossart Reviewed by John Naylor and Tom Lane Discussion: https://www.postgresql.org/message-id/flat/CAFBsxsEyR9JkfbPcDXBRYEfdfC__OkwVGdwEAgY4Rv0cvw35EA%40mail.gmail.com#aba7a64b11503494ffd8dd27067626a9
Diffstat (limited to 'src/include/port/simd.h')
-rw-r--r--src/include/port/simd.h99
1 files changed, 82 insertions, 17 deletions
diff --git a/src/include/port/simd.h b/src/include/port/simd.h
index a425cd887b1..b508d47b12f 100644
--- a/src/include/port/simd.h
+++ b/src/include/port/simd.h
@@ -31,22 +31,32 @@
#include <emmintrin.h>
#define USE_SSE2
typedef __m128i Vector8;
+typedef __m128i Vector32;
#else
/*
* If no SIMD instructions are available, we can in some cases emulate vector
- * operations using bitwise operations on unsigned integers.
+ * operations using bitwise operations on unsigned integers. Note that many
+ * of the functions in this file presently do not have non-SIMD
+ * implementations. In particular, none of the functions involving Vector32
+ * are implemented without SIMD since it's likely not worthwhile to represent
+ * two 32-bit integers using a uint64.
*/
#define USE_NO_SIMD
typedef uint64 Vector8;
#endif
-
/* load/store operations */
static inline void vector8_load(Vector8 *v, const uint8 *s);
+#ifndef USE_NO_SIMD
+static inline void vector32_load(Vector32 *v, const uint32 *s);
+#endif
/* assignment operations */
static inline Vector8 vector8_broadcast(const uint8 c);
+#ifndef USE_NO_SIMD
+static inline Vector32 vector32_broadcast(const uint32 c);
+#endif
/* element-wise comparisons to a scalar */
static inline bool vector8_has(const Vector8 v, const uint8 c);
@@ -56,14 +66,21 @@ static inline bool vector8_is_highbit_set(const Vector8 v);
/* arithmetic operations */
static inline Vector8 vector8_or(const Vector8 v1, const Vector8 v2);
-
-/* Different semantics for SIMD architectures. */
#ifndef USE_NO_SIMD
+static inline Vector32 vector32_or(const Vector32 v1, const Vector32 v2);
+static inline Vector8 vector8_ssub(const Vector8 v1, const Vector8 v2);
+#endif
-/* comparisons between vectors */
+/*
+ * comparisons between vectors
+ *
+ * Note: These return a vector rather than booloan, which is why we don't
+ * have non-SIMD implementations.
+ */
+#ifndef USE_NO_SIMD
static inline Vector8 vector8_eq(const Vector8 v1, const Vector8 v2);
-
-#endif /* ! USE_NO_SIMD */
+static inline Vector32 vector32_eq(const Vector32 v1, const Vector32 v2);
+#endif
/*
* Load a chunk of memory into the given vector.
@@ -78,6 +95,15 @@ vector8_load(Vector8 *v, const uint8 *s)
#endif
}
+#ifndef USE_NO_SIMD
+static inline void
+vector32_load(Vector32 *v, const uint32 *s)
+{
+#ifdef USE_SSE2
+ *v = _mm_loadu_si128((const __m128i *) s);
+#endif
+}
+#endif /* ! USE_NO_SIMD */
/*
* Create a vector with all elements set to the same value.
@@ -92,6 +118,16 @@ vector8_broadcast(const uint8 c)
#endif
}
+#ifndef USE_NO_SIMD
+static inline Vector32
+vector32_broadcast(const uint32 c)
+{
+#ifdef USE_SSE2
+ return _mm_set1_epi32(c);
+#endif
+}
+#endif /* ! USE_NO_SIMD */
+
/*
* Return true if any elements in the vector are equal to the given scalar.
*/
@@ -118,7 +154,7 @@ vector8_has(const Vector8 v, const uint8 c)
/* any bytes in v equal to c will evaluate to zero via XOR */
result = vector8_has_zero(v ^ vector8_broadcast(c));
#elif defined(USE_SSE2)
- result = _mm_movemask_epi8(_mm_cmpeq_epi8(v, vector8_broadcast(c)));
+ result = vector8_is_highbit_set(vector8_eq(v, vector8_broadcast(c)));
#endif
Assert(assert_result == result);
@@ -133,8 +169,8 @@ vector8_has_zero(const Vector8 v)
{
#if defined(USE_NO_SIMD)
/*
- * We cannot call vector8_has() here, because that would lead to a circular
- * definition.
+ * We cannot call vector8_has() here, because that would lead to a
+ * circular definition.
*/
return vector8_has_le(v, 0);
#elif defined(USE_SSE2)
@@ -150,9 +186,6 @@ static inline bool
vector8_has_le(const Vector8 v, const uint8 c)
{
bool result = false;
-#if defined(USE_SSE2)
- __m128i sub;
-#endif
/* pre-compute the result for assert checking */
#ifdef USE_ASSERT_CHECKING
@@ -194,10 +227,10 @@ vector8_has_le(const Vector8 v, const uint8 c)
/*
* Use saturating subtraction to find bytes <= c, which will present as
- * NUL bytes in 'sub'.
+ * NUL bytes. This approach is a workaround for the lack of unsigned
+ * comparison instructions on some architectures.
*/
- sub = _mm_subs_epu8(v, vector8_broadcast(c));
- result = vector8_has_zero(sub);
+ result = vector8_has_zero(vector8_ssub(v, vector8_broadcast(c)));
#endif
Assert(assert_result == result);
@@ -230,14 +263,37 @@ vector8_or(const Vector8 v1, const Vector8 v2)
#endif
}
+#ifndef USE_NO_SIMD
+static inline Vector32
+vector32_or(const Vector32 v1, const Vector32 v2)
+{
+#ifdef USE_SSE2
+ return _mm_or_si128(v1, v2);
+#endif
+}
+#endif /* ! USE_NO_SIMD */
-/* Different semantics for SIMD architectures. */
+/*
+ * Return the result of subtracting the respective elements of the input
+ * vectors using saturation (i.e., if the operation would yield a value less
+ * than zero, zero is returned instead). For more information on saturation
+ * arithmetic, see https://en.wikipedia.org/wiki/Saturation_arithmetic
+ */
#ifndef USE_NO_SIMD
+static inline Vector8
+vector8_ssub(const Vector8 v1, const Vector8 v2)
+{
+#ifdef USE_SSE2
+ return _mm_subs_epu8(v1, v2);
+#endif
+}
+#endif /* ! USE_NO_SIMD */
/*
* Return a vector with all bits set in each lane where the the corresponding
* lanes in the inputs are equal.
*/
+#ifndef USE_NO_SIMD
static inline Vector8
vector8_eq(const Vector8 v1, const Vector8 v2)
{
@@ -245,7 +301,16 @@ vector8_eq(const Vector8 v1, const Vector8 v2)
return _mm_cmpeq_epi8(v1, v2);
#endif
}
+#endif /* ! USE_NO_SIMD */
+#ifndef USE_NO_SIMD
+static inline Vector32
+vector32_eq(const Vector32 v1, const Vector32 v2)
+{
+#ifdef USE_SSE2
+ return _mm_cmpeq_epi32(v1, v2);
+#endif
+}
#endif /* ! USE_NO_SIMD */
#endif /* SIMD_H */