Apache NuttX is a mature, real-time embedded operating system (RTOS)

UK Tax Calculator & Visualiser

Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

SDRAM Controller

Open-source high-performance RISC-V processor

An OS X project that holds a simple framework for the GOCR ( http://jocr.sourceforge.net)

Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at http://git.buildroot.net/buildroot/. Do not open issues or…

GCC for XAP

Linux kernel block layer testing framework

Ariane is a 6-stage RISC-V CPU

Testing processors with Random Instruction Generation

Ibex is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, previously known as zero-riscy.

[UNRELEASED] Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

GNU toolchain for RISC-V, including GCC

A simple verilog module for programming (Q)SPI flash memories.

AXI4 and AXI4-Lite interface definitions and testbench utilities

RISC-V Debug Support for our PULP Cores

Implementation of a RISC-V-compatible Platform Interrupt Controller (PLIC)

VHDL implementation of the RISC-V System-on-Chip based on bare "Rocket Chip".

A simple tool for verifying readback data for Xilinx Virtex 5 and 7-series devices

Verilog SDRAM memory controller

Universal number Posit HDL Arithmetic Architecture generator