#include "Target/Mips/MipsSubtarget.h"
Definition at line 37 of file MipsSubtarget.h.
◆ MipsSubtarget()
This constructor initializes the data members to match that of the specified triple.
Definition at line 71 of file MipsSubtarget.cpp.
References assert(), CallLoweringInfo, llvm::createMipsInstructionSelector(), llvm::errs(), getRegisterInfo(), getTargetLowering(), GPOpt, hasCRC(), hasDSP(), hasDSPR2(), hasGINV(), hasMips32(), hasMips32r2(), hasMips32r5(), hasMips32r6(), hasMips64(), hasMips64r2(), hasMips64r6(), hasMSA(), hasSym32(), hasVirt(), inAbs2008Mode(), initializeSubtargetDependencies(), InstSelector, isABI_N32(), isABI_N64(), isABI_O32(), isFP64bit(), isGP64bit(), isNaN2008(), Legalizer, llvm::little, Mips_Os16, Mixed16_32, RegBankInfo, llvm::report_fatal_error(), and useOddSPReg().
◆ ~MipsSubtarget()
MipsSubtarget::~MipsSubtarget |
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overridedefault |
◆ allowMixed16_32()
bool llvm::MipsSubtarget::allowMixed16_32 |
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const |
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inline |
◆ disableMadd4()
bool llvm::MipsSubtarget::disableMadd4 |
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const |
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inline |
◆ enableLongBranchPass()
bool llvm::MipsSubtarget::enableLongBranchPass |
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const |
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inline |
◆ enablePostRAScheduler()
bool MipsSubtarget::enablePostRAScheduler |
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const |
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override |
This overrides the PostRAScheduler bit in the SchedModel for each CPU.
This overrides the PostRAScheduler bit in the SchedModel for any CPU.
Definition at line 233 of file MipsSubtarget.cpp.
◆ getABI()
◆ getCallLowering()
◆ getCriticalPathRCs()
void MipsSubtarget::getCriticalPathRCs |
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RegClassVector & | CriticalPathRCs | ) |
const |
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override |
◆ getFrameLowering()
◆ getGPRSizeInBytes()
unsigned llvm::MipsSubtarget::getGPRSizeInBytes |
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const |
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◆ getInstrInfo()
◆ getInstrItineraryData()
◆ getInstructionSelector()
◆ getLegalizerInfo()
◆ getOptLevelToEnablePostRAScheduler()
CodeGenOptLevel MipsSubtarget::getOptLevelToEnablePostRAScheduler |
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const |
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override |
◆ getRegBankInfo()
◆ getRegisterInfo()
◆ getRelocationModel()
◆ getSelectionDAGInfo()
◆ getStackAlignment()
Align llvm::MipsSubtarget::getStackAlignment |
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const |
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◆ getTargetLowering()
◆ has3D()
bool llvm::MipsSubtarget::has3D |
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const |
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◆ hasCnMips()
bool llvm::MipsSubtarget::hasCnMips |
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const |
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inline |
◆ hasCnMipsP()
bool llvm::MipsSubtarget::hasCnMipsP |
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const |
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◆ hasCRC()
bool llvm::MipsSubtarget::hasCRC |
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const |
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inline |
◆ hasDSP()
bool llvm::MipsSubtarget::hasDSP |
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const |
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inline |
◆ hasDSPR2()
bool llvm::MipsSubtarget::hasDSPR2 |
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const |
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inline |
◆ hasDSPR3()
bool llvm::MipsSubtarget::hasDSPR3 |
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const |
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inline |
◆ hasEVA()
bool llvm::MipsSubtarget::hasEVA |
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const |
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inline |
◆ hasExtractInsert()
bool llvm::MipsSubtarget::hasExtractInsert |
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const |
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inline |
◆ hasGINV()
bool llvm::MipsSubtarget::hasGINV |
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const |
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inline |
◆ hasMips1()
bool llvm::MipsSubtarget::hasMips1 |
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const |
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inline |
◆ hasMips2()
bool llvm::MipsSubtarget::hasMips2 |
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const |
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inline |
◆ hasMips3()
bool llvm::MipsSubtarget::hasMips3 |
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const |
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inline |
◆ hasMips32()
bool llvm::MipsSubtarget::hasMips32 |
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const |
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inline |
◆ hasMips32r2()
bool llvm::MipsSubtarget::hasMips32r2 |
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const |
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◆ hasMips32r3()
bool llvm::MipsSubtarget::hasMips32r3 |
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const |
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inline |
◆ hasMips32r5()
bool llvm::MipsSubtarget::hasMips32r5 |
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const |
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inline |
◆ hasMips32r6()
bool llvm::MipsSubtarget::hasMips32r6 |
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const |
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◆ hasMips4()
bool llvm::MipsSubtarget::hasMips4 |
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const |
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◆ hasMips4_32()
bool llvm::MipsSubtarget::hasMips4_32 |
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const |
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inline |
◆ hasMips4_32r2()
bool llvm::MipsSubtarget::hasMips4_32r2 |
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const |
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◆ hasMips5()
bool llvm::MipsSubtarget::hasMips5 |
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const |
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◆ hasMips64()
bool llvm::MipsSubtarget::hasMips64 |
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const |
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inline |
◆ hasMips64r2()
bool llvm::MipsSubtarget::hasMips64r2 |
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const |
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inline |
◆ hasMips64r3()
bool llvm::MipsSubtarget::hasMips64r3 |
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const |
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◆ hasMips64r5()
bool llvm::MipsSubtarget::hasMips64r5 |
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const |
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◆ hasMips64r6()
bool llvm::MipsSubtarget::hasMips64r6 |
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const |
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◆ hasMSA()
bool llvm::MipsSubtarget::hasMSA |
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const |
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inline |
◆ hasMT()
bool llvm::MipsSubtarget::hasMT |
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const |
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◆ hasMTHC1()
bool llvm::MipsSubtarget::hasMTHC1 |
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const |
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◆ hasStandardEncoding()
bool llvm::MipsSubtarget::hasStandardEncoding |
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const |
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◆ hasSym32()
bool llvm::MipsSubtarget::hasSym32 |
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const |
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◆ hasVFPU()
bool llvm::MipsSubtarget::hasVFPU |
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const |
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◆ hasVirt()
bool llvm::MipsSubtarget::hasVirt |
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const |
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◆ inAbs2008Mode()
bool llvm::MipsSubtarget::inAbs2008Mode |
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const |
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◆ initializeSubtargetDependencies()
◆ inMicroMips32r6Mode()
bool llvm::MipsSubtarget::inMicroMips32r6Mode |
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const |
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◆ inMicroMipsMode()
bool llvm::MipsSubtarget::inMicroMipsMode |
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const |
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◆ inMips16HardFloat()
bool llvm::MipsSubtarget::inMips16HardFloat |
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const |
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◆ inMips16Mode()
bool llvm::MipsSubtarget::inMips16Mode |
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const |
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◆ inMips16ModeDefault()
bool llvm::MipsSubtarget::inMips16ModeDefault |
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const |
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◆ isABI_FPXX()
bool llvm::MipsSubtarget::isABI_FPXX |
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const |
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◆ isABI_N32()
bool MipsSubtarget::isABI_N32 |
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const |
◆ isABI_N64()
bool MipsSubtarget::isABI_N64 |
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const |
◆ isABI_O32()
bool MipsSubtarget::isABI_O32 |
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const |
◆ isABICalls()
bool llvm::MipsSubtarget::isABICalls |
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const |
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inline |
◆ isFP64bit()
bool llvm::MipsSubtarget::isFP64bit |
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const |
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inline |
◆ isFPXX()
bool llvm::MipsSubtarget::isFPXX |
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const |
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inline |
◆ isGP32bit()
bool llvm::MipsSubtarget::isGP32bit |
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const |
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inline |
◆ isGP64bit()
bool llvm::MipsSubtarget::isGP64bit |
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const |
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inline |
◆ isLittle()
bool llvm::MipsSubtarget::isLittle |
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const |
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inline |
◆ isNaN2008()
bool llvm::MipsSubtarget::isNaN2008 |
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const |
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inline |
◆ isPositionIndependent()
bool MipsSubtarget::isPositionIndependent |
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const |
◆ isPTR32bit()
bool llvm::MipsSubtarget::isPTR32bit |
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const |
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◆ isPTR64bit()
bool llvm::MipsSubtarget::isPTR64bit |
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const |
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inline |
◆ isSingleFloat()
bool llvm::MipsSubtarget::isSingleFloat |
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const |
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inline |
◆ isTargetCOFF()
bool llvm::MipsSubtarget::isTargetCOFF |
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const |
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inline |
◆ isTargetELF()
bool llvm::MipsSubtarget::isTargetELF |
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const |
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inline |
◆ isTargetWindows()
bool llvm::MipsSubtarget::isTargetWindows |
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const |
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inline |
◆ isXRaySupported()
bool llvm::MipsSubtarget::isXRaySupported |
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const |
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inlineoverride |
◆ noOddSPReg()
bool llvm::MipsSubtarget::noOddSPReg |
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const |
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inline |
◆ os16()
bool llvm::MipsSubtarget::os16 |
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const |
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inline |
◆ ParseSubtargetFeatures()
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
Definition of function is auto generated by tblgen.
Referenced by initializeSubtargetDependencies().
◆ setHelperClassesMips16()
void llvm::MipsSubtarget::setHelperClassesMips16 |
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◆ setHelperClassesMipsSE()
void llvm::MipsSubtarget::setHelperClassesMipsSE |
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◆ systemSupportsUnalignedAccess()
bool llvm::MipsSubtarget::systemSupportsUnalignedAccess |
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const |
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inline |
Does the system support unaligned memory access.
MIPS32r6/MIPS64r6 require full unaligned access support but does not specify which component of the system provides it. Hardware, software, and hybrid implementations are all valid.
Definition at line 379 of file MipsSubtarget.h.
References hasMips32r6().
Referenced by isGprbTwoInstrUnalignedLoadOrStore().
◆ useConstantIslands()
bool MipsSubtarget::useConstantIslands |
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◆ useIndirectJumpsHazard()
bool llvm::MipsSubtarget::useIndirectJumpsHazard |
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const |
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inline |
◆ useLongCalls()
bool llvm::MipsSubtarget::useLongCalls |
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const |
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inline |
◆ useOddSPReg()
bool llvm::MipsSubtarget::useOddSPReg |
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const |
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inline |
◆ useSmallSection()
bool llvm::MipsSubtarget::useSmallSection |
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const |
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inline |
◆ useSoftFloat()
bool llvm::MipsSubtarget::useSoftFloat |
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const |
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inline |
◆ useXGOT()
bool llvm::MipsSubtarget::useXGOT |
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const |
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inline |
◆ CallLoweringInfo
std::unique_ptr<CallLowering> llvm::MipsSubtarget::CallLoweringInfo |
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protected |
◆ InstSelector
◆ Legalizer
◆ RegBankInfo
The documentation for this class was generated from the following files: