#include "Target/RISCV/MCTargetDesc/RISCVAsmBackend.h"

Inheritance diagram for llvm::RISCVAsmBackend:

Public Member Functions
	RISCVAsmBackend (const MCSubtargetInfo &STI, uint8_t OSABI, bool Is64Bit, bool IsLittleEndian, const MCTargetOptions &Options)
	~RISCVAsmBackend () override=default
std::optional< bool >	evaluateFixup (const MCFragment &, MCFixup &, MCValue &, uint64_t &) override
bool	addReloc (const MCFragment &, const MCFixup &, const MCValue &, uint64_t &FixedValue, bool IsResolved)
void	maybeAddVendorReloc (const MCFragment &, const MCFixup &)
void	applyFixup (const MCFragment &, const MCFixup &, const MCValue &Target, uint8_t *Data, uint64_t Value, bool IsResolved) override
std::unique_ptr< MCObjectTargetWriter >	createObjectTargetWriter () const override
bool	fixupNeedsRelaxationAdvanced (const MCFragment &, const MCFixup &, const MCValue &, uint64_t, bool) const override
	Target specific predicate for whether a given fixup requires the associated instruction to be relaxed.
std::optional< MCFixupKind >	getFixupKind (StringRef Name) const override
	Map a relocation name used in .reloc to a fixup kind.
MCFixupKindInfo	getFixupKindInfo (MCFixupKind Kind) const override
	Get information on a fixup kind.
bool	mayNeedRelaxation (unsigned Opcode, ArrayRef< MCOperand > Operands, const MCSubtargetInfo &STI) const override
	Check whether the given instruction (encoded as Opcode+Operands) may need relaxation.
void	relaxInstruction (MCInst &Inst, const MCSubtargetInfo &STI) const override
	Relax the instruction in the given fragment to the next wider instruction.
bool	relaxAlign (MCFragment &F, unsigned &Size) override
bool	relaxDwarfLineAddr (MCFragment &) const override
bool	relaxDwarfCFA (MCFragment &) const override
std::pair< bool, bool >	relaxLEB128 (MCFragment &LF, int64_t &Value) const override
bool	writeNopData (raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override
	Write an (optimal) nop sequence of Count bytes to the given output.
const MCTargetOptions &	getTargetOptions () const
Public Member Functions inherited from llvm::MCAsmBackend
	MCAsmBackend (const MCAsmBackend &)=delete
MCAsmBackend &	operator= (const MCAsmBackend &)=delete
virtual	~MCAsmBackend ()
void	setAssembler (MCAssembler *A)
MCContext &	getContext () const
bool	allowAutoPadding () const
	Return true if this target might automatically pad instructions and thus need to emit padding enable/disable directives around sensative code.
bool	allowEnhancedRelaxation () const
	Return true if this target allows an unrelaxable instruction to be emitted into RelaxableFragment and then we can increase its size in a tricky way for optimization.
virtual void	reset ()
	lifetime management
std::unique_ptr< MCObjectWriter >	createObjectWriter (raw_pwrite_stream &OS) const
	Create a new MCObjectWriter instance for use by the assembler backend to emit the final object file.
std::unique_ptr< MCObjectWriter >	createDwoObjectWriter (raw_pwrite_stream &OS, raw_pwrite_stream &DwoOS) const
	Create an MCObjectWriter that writes two object files: a .o file which is linked into the final program and a .dwo file which is used by debuggers.
virtual unsigned	getMinimumNopSize () const
	Returns the minimum size of a nop in bytes on this target.
virtual unsigned	getMaximumNopSize (const MCSubtargetInfo &STI) const
	Returns the maximum size of a nop in bytes on this target.
virtual bool	finishLayout (const MCAssembler &Asm) const
virtual uint64_t	generateCompactUnwindEncoding (const MCDwarfFrameInfo FI, const MCContext Ctxt) const
	Generate the compact unwind encoding for the CFI instructions.
bool	isDarwinCanonicalPersonality (const MCSymbol *Sym) const
void	maybeAddReloc (const MCFragment &, const MCFixup &, const MCValue &, uint64_t &Value, bool IsResolved)
virtual bool	fixupNeedsRelaxation (const MCFixup &Fixup, uint64_t Value) const
	Simple predicate for targets where !Resolved implies requiring relaxation.

Additional Inherited Members
Static Public Member Functions inherited from llvm::MCAsmBackend
static const MCSubtargetInfo *	getSubtargetInfo (const MCFragment &F)
Public Attributes inherited from llvm::MCAsmBackend
const llvm::endianness	Endian
Protected Member Functions inherited from llvm::MCAsmBackend
	MCAsmBackend (llvm::endianness Endian)
Protected Attributes inherited from llvm::MCAsmBackend
MCAssembler *	Asm = nullptr
bool	AllowAutoPadding = false
bool	AllowEnhancedRelaxation = false

Detailed Description

Definition at line 24 of file RISCVAsmBackend.h.

Constructor & Destructor Documentation

◆ RISCVAsmBackend()

RISCVAsmBackend::RISCVAsmBackend	(	const MCSubtargetInfo &	STI,
		uint8_t	OSABI,
		bool	Is64Bit,
		bool	IsLittleEndian,
		const MCTargetOptions &	Options )

Definition at line 40 of file RISCVAsmBackend.cpp.

References llvm::big, llvm::little, llvm::MCAsmBackend::MCAsmBackend(), Options, and llvm::RISCVFeatures::validate().

◆ ~RISCVAsmBackend()

llvm::RISCVAsmBackend::~RISCVAsmBackend ( )

overridedefault

References llvm::Count, llvm::Data, F, Operands, and Size.

Member Function Documentation

◆ addReloc()

bool RISCVAsmBackend::addReloc	(	const MCFragment &	F,
		const MCFixup &	Fixup,
		const MCValue &	Target,
		uint64_t &	FixedValue,
		bool	IsResolved )

Definition at line 832 of file RISCVAsmBackend.cpp.

References A(), llvm::MCAsmBackend::Asm, assert(), B(), llvm::MCFixup::create(), F, Fixup, llvm::FK_Data_1, llvm::FK_Data_2, llvm::FK_Data_4, llvm::FK_Data_8, llvm::FK_Data_leb128, llvm::MCValue::get(), llvm_unreachable, maybeAddVendorReloc(), and relaxableFixupNeedsRelocation().

Referenced by applyFixup().

◆ applyFixup()

void RISCVAsmBackend::applyFixup	(	const MCFragment &	F,
		const MCFixup &	Fixup,
		const MCValue &	Target,
		uint8_t *	Data,
		uint64_t	Value,
		bool	IsResolved )

overridevirtual

Implements llvm::MCAsmBackend.

Definition at line 921 of file RISCVAsmBackend.cpp.

References addReloc(), adjustFixupValue(), llvm::alignTo(), assert(), llvm::big, llvm::Data, llvm::MCAsmBackend::Endian, F, Fixup, llvm::MCAsmBackend::getContext(), getFixupKindInfo(), isDataFixup(), and llvm::mc::isRelocation().

◆ createObjectTargetWriter()

std::unique_ptr< MCObjectTargetWriter > RISCVAsmBackend::createObjectTargetWriter ( ) const

overridevirtual

Implements llvm::MCAsmBackend.

Definition at line 953 of file RISCVAsmBackend.cpp.

References llvm::createRISCVELFObjectWriter().

◆ evaluateFixup()

std::optional< bool > RISCVAsmBackend::evaluateFixup	(	const MCFragment &	,
		MCFixup &	Fixup,
		MCValue &	Target,
		uint64_t &	Value )

overridevirtual

◆ fixupNeedsRelaxationAdvanced()

bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced	(	const MCFragment &	,
		const MCFixup &	Fixup,
		const MCValue &	,
		uint64_t	Value,
		bool	Resolved ) const

overridevirtual

Target specific predicate for whether a given fixup requires the associated instruction to be relaxed.

Reimplemented from llvm::MCAsmBackend.

Definition at line 114 of file RISCVAsmBackend.cpp.

References Fixup, llvm::RISCV::fixup_riscv_branch, llvm::RISCV::fixup_riscv_jal, llvm::RISCV::fixup_riscv_qc_e_branch, llvm::RISCV::fixup_riscv_rvc_branch, llvm::RISCV::fixup_riscv_rvc_imm, llvm::RISCV::fixup_riscv_rvc_jump, and llvm::Offset.

◆ getFixupKind()

std::optional< MCFixupKind > RISCVAsmBackend::getFixupKind ( StringRef Name ) const

overridevirtual

Map a relocation name used in .reloc to a fixup kind.

Reimplemented from llvm::MCAsmBackend.

Definition at line 49 of file RISCVAsmBackend.cpp.

References llvm::StringSwitch< T, R >::Case(), llvm::StringSwitch< T, R >::Default(), and llvm::FirstLiteralRelocationKind.

◆ getFixupKindInfo()

MCFixupKindInfo RISCVAsmBackend::getFixupKindInfo ( MCFixupKind Kind ) const

overridevirtual

Get information on a fixup kind.

Reimplemented from llvm::MCAsmBackend.

Definition at line 69 of file RISCVAsmBackend.cpp.

References assert(), llvm::FirstTargetFixupKind, llvm::MCAsmBackend::getFixupKindInfo(), llvm::mc::isRelocation(), and llvm::RISCV::NumTargetFixupKinds.

Referenced by applyFixup().

◆ getTargetOptions()

const MCTargetOptions & llvm::RISCVAsmBackend::getTargetOptions ( ) const

inline

Definition at line 76 of file RISCVAsmBackend.h.

◆ maybeAddVendorReloc()

void RISCVAsmBackend::maybeAddVendorReloc	(	const MCFragment &	F,
		const MCFixup &	Fixup )

Definition at line 772 of file RISCVAsmBackend.cpp.

References llvm::MCAsmBackend::Asm, llvm::MCConstantExpr::create(), llvm::MCFixup::create(), F, Fixup, llvm::RISCV::fixup_riscv_nds_branch_10, llvm::RISCV::fixup_riscv_qc_abs20_u, llvm::RISCV::fixup_riscv_qc_e_32, llvm::RISCV::fixup_riscv_qc_e_branch, llvm::RISCV::fixup_riscv_qc_e_call_plt, llvm::MCValue::get(), and llvm::MCSymbol::setVariableValue().

Referenced by addReloc().

◆ mayNeedRelaxation()

bool RISCVAsmBackend::mayNeedRelaxation	(	unsigned	Opcode,
		ArrayRef< MCOperand >	Operands,
		const MCSubtargetInfo &	STI ) const

overridevirtual

Check whether the given instruction (encoded as Opcode+Operands) may need relaxation.

Reimplemented from llvm::MCAsmBackend.

Definition at line 455 of file RISCVAsmBackend.cpp.

References getRelaxedOpcode(), and Operands.

◆ relaxAlign()

bool RISCVAsmBackend::relaxAlign	(	MCFragment &	F,
		unsigned &	Size )

overridevirtual

Reimplemented from llvm::MCAsmBackend.

Definition at line 315 of file RISCVAsmBackend.cpp.

References AlignRvc, llvm::MCConstantExpr::create(), llvm::MCFixup::create(), F, llvm::FirstLiteralRelocationKind, Fixup, llvm::MCAsmBackend::getContext(), and Size.

◆ relaxDwarfCFA()

bool RISCVAsmBackend::relaxDwarfCFA ( MCFragment & F ) const

overridevirtual

Reimplemented from llvm::MCAsmBackend.

Definition at line 394 of file RISCVAsmBackend.cpp.

References llvm::MCAsmBackend::Asm, assert(), llvm::cast(), llvm::MCFixup::create(), llvm::Data, llvm::MCAsmBackend::Endian, llvm::MCExpr::evaluateKnownAbsolute(), F, Fixup, llvm::MCAsmBackend::getContext(), llvm::MCBinaryExpr::getLHS(), llvm::MCBinaryExpr::getRHS(), llvm::isUInt(), llvm::isUIntN(), llvm_unreachable, llvm::Offset, and llvm::support::endian::write().

◆ relaxDwarfLineAddr()

bool RISCVAsmBackend::relaxDwarfLineAddr ( MCFragment & F ) const

overridevirtual

◆ relaxInstruction()

void RISCVAsmBackend::relaxInstruction	(	MCInst &	Inst,
		const MCSubtargetInfo &	STI ) const

overridevirtual

Relax the instruction in the given fragment to the next wider instruction.

Parameters

[out]	Inst	The instruction to relax, which is also the relaxed instruction.
	STI	the subtarget information for the associated instruction.

Reimplemented from llvm::MCAsmBackend.

Definition at line 236 of file RISCVAsmBackend.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::MCInst::getOperands(), llvm::MCOperand::getReg(), getRelaxedOpcode(), llvm_unreachable, llvm::MCInst::setOpcode(), llvm::Success, and llvm::RISCVRVC::uncompress().

◆ relaxLEB128()

std::pair< bool, bool > RISCVAsmBackend::relaxLEB128	(	MCFragment &	LF,
		int64_t &	Value ) const

overridevirtual

Reimplemented from llvm::MCAsmBackend.

Definition at line 444 of file RISCVAsmBackend.cpp.

References llvm::MCAsmBackend::Asm, llvm::MCFixup::create(), llvm::MCExpr::evaluateKnownAbsolute(), llvm::FK_Data_leb128, llvm::MCFragment::getLEBValue(), llvm::MCFragment::isLEBSigned(), llvm::MCFragment::setVarFixups(), and ULEB128Reloc.

◆ writeNopData()

bool RISCVAsmBackend::writeNopData	(	raw_ostream &	OS,
		uint64_t	Count,
		const MCSubtargetInfo *	STI ) const

overridevirtual

Write an (optimal) nop sequence of Count bytes to the given output.

If the target cannot generate such a sequence, it should return an error.

Returns: - True on success.

Implements llvm::MCAsmBackend.

Definition at line 467 of file RISCVAsmBackend.cpp.

References llvm::Count, and llvm::raw_ostream::write().

The documentation for this class was generated from the following files:

lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp

Public Member Functions

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ RISCVAsmBackend()

◆ ~RISCVAsmBackend()

Member Function Documentation

◆ addReloc()

◆ applyFixup()

◆ createObjectTargetWriter()

◆ evaluateFixup()

◆ fixupNeedsRelaxationAdvanced()

◆ getFixupKind()

◆ getFixupKindInfo()

◆ getTargetOptions()

◆ maybeAddVendorReloc()

◆ mayNeedRelaxation()

◆ relaxAlign()

◆ relaxDwarfCFA()

◆ relaxDwarfLineAddr()

◆ relaxInstruction()

◆ relaxLEB128()

◆ writeNopData()