LLVM 22.0.0git
llvm::ARM Namespace Reference

Define some predicates that are used for node matching. More...

Namespaces

namespace  EHABI
namespace  WinEH

Classes

struct  ArchNames
struct  CpuNames
struct  ExtName
struct  FPUName
struct  ParsedBranchProtection

Typedefs

using Specifier = uint16_t

Enumerations

enum  ARMABI { ARM_ABI_UNKNOWN , ARM_ABI_APCS , ARM_ABI_AAPCS , ARM_ABI_AAPCS16 }
enum  ArchExtKind : uint64_t {
  AEK_INVALID = 0 , AEK_NONE = 1 , AEK_CRC = 1 << 1 , AEK_CRYPTO = 1 << 2 ,
  AEK_FP = 1 << 3 , AEK_HWDIVTHUMB = 1 << 4 , AEK_HWDIVARM = 1 << 5 , AEK_MP = 1 << 6 ,
  AEK_SIMD = 1 << 7 , AEK_SEC = 1 << 8 , AEK_VIRT = 1 << 9 , AEK_DSP = 1 << 10 ,
  AEK_FP16 = 1 << 11 , AEK_RAS = 1 << 12 , AEK_DOTPROD = 1 << 13 , AEK_SHA2 = 1 << 14 ,
  AEK_AES = 1 << 15 , AEK_FP16FML = 1 << 16 , AEK_SB = 1 << 17 , AEK_FP_DP = 1 << 18 ,
  AEK_LOB = 1 << 19 , AEK_BF16 = 1 << 20 , AEK_I8MM = 1 << 21 , AEK_CDECP0 = 1 << 22 ,
  AEK_CDECP1 = 1 << 23 , AEK_CDECP2 = 1 << 24 , AEK_CDECP3 = 1 << 25 , AEK_CDECP4 = 1 << 26 ,
  AEK_CDECP5 = 1 << 27 , AEK_CDECP6 = 1 << 28 , AEK_CDECP7 = 1 << 29 , AEK_PACBTI = 1 << 30 ,
  AEK_MVE = 1ULL << 31 , AEK_OS = 1ULL << 59 , AEK_IWMMXT = 1ULL << 60 , AEK_IWMMXT2 = 1ULL << 61 ,
  AEK_MAVERICK = 1ULL << 62 , AEK_XSCALE = 1ULL << 63
}
enum class  ArchKind { ARM_FPU }
enum  FPUKind { ARM_FPU , ARM_FPU }
enum class  FPUVersion {
  NONE , VFPV2 , VFPV3 , VFPV3_FP16 ,
  VFPV4 , VFPV5 , VFPV5_FULLFP16
}
enum class  FPURestriction { None = 0 , D16 , SP_D16 }
enum class  NeonSupportLevel { None = 0 , Neon , Crypto }
enum class  ProfileKind { INVALID = 0 , A , R , M }
enum class  ISAKind { INVALID = 0 , ARM , THUMB , AARCH64 }
enum class  EndianKind { INVALID = 0 , LITTLE , BIG }
enum  DW_ISA { DW_ISA_ARM_thumb = 1 , DW_ISA_ARM_arm = 2 }
enum  Rounding {
  RN = 0 , RP = 1 , RM = 2 , RZ = 3 ,
  rmMask = 3
}
 Possible values of current rounding mode, which is specified in bits 23:22 of FPSCR. More...
enum  PartialMappingIdx { PMI_GPR , PMI_SPR , PMI_DPR , PMI_Min = PMI_GPR }
enum  ValueMappingIdx { InvalidIdx = 0 , GPR3OpsIdx = 1 , SPR3OpsIdx = 4 , DPR3OpsIdx = 7 }
enum  Fixups {
  fixup_arm_ldst_pcrel_12 = FirstTargetFixupKind , fixup_t2_ldst_pcrel_12 , fixup_arm_pcrel_10_unscaled , fixup_arm_pcrel_10 ,
  fixup_t2_pcrel_10 , fixup_arm_pcrel_9 , fixup_t2_pcrel_9 , fixup_arm_ldst_abs_12 ,
  fixup_thumb_adr_pcrel_10 , fixup_arm_adr_pcrel_12 , fixup_t2_adr_pcrel_12 , fixup_arm_condbranch ,
  fixup_arm_uncondbranch , fixup_t2_condbranch , fixup_t2_uncondbranch , fixup_arm_thumb_br ,
  fixup_arm_uncondbl , fixup_arm_condbl , fixup_arm_blx , fixup_arm_thumb_bl ,
  fixup_arm_thumb_blx , fixup_arm_thumb_cb , fixup_arm_thumb_cp , fixup_arm_thumb_bcc ,
  fixup_arm_movt_hi16 , fixup_arm_movw_lo16 , fixup_t2_movt_hi16 , fixup_t2_movw_lo16 ,
  fixup_arm_thumb_upper_8_15 , fixup_arm_thumb_upper_0_7 , fixup_arm_thumb_lower_8_15 , fixup_arm_thumb_lower_0_7 ,
  fixup_arm_mod_imm , fixup_t2_so_imm , fixup_bf_branch , fixup_bf_target ,
  fixup_bfl_target , fixup_bfc_target , fixup_bfcsel_else_target , fixup_wls ,
  fixup_le , LastTargetFixupKind , NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
}
enum  {
  S_None , S_COFF_SECREL , S_HI16 , S_LO16 ,
  S_HI_8_15 , S_HI_0_7 , S_LO_8_15 , S_LO_0_7 ,
  S_ARM_NONE , S_FUNCDESC , S_GOT , S_GOTFUNCDESC ,
  S_GOTOFF , S_GOTOFFFUNCDESC , S_GOTTPOFF , S_GOTTPOFF_FDPIC ,
  S_GOT_PREL , S_PLT , S_PREL31 , S_SBREL ,
  S_TARGET1 , S_TARGET2 , S_TLSCALL , S_TLSDESC ,
  S_TLSDESCSEQ , S_TLSGD , S_TLSGD_FDPIC , S_TLSLDM ,
  S_TLSLDM_FDPIC , S_TLSLDO , S_TPOFF
}
enum  OperandType { OPERAND_VPRED_R = MCOI::OPERAND_FIRST_TARGET , OPERAND_VPRED_N }
enum class  PredBlockMask {
  T = 0b1000 , TT = 0b0100 , TE = 0b1100 , TTT = 0b0010 ,
  TTE = 0b0110 , TEE = 0b1110 , TET = 0b1010 , TTTT = 0b0001 ,
  TTTE = 0b0011 , TTEE = 0b0111 , TTET = 0b0101 , TEEE = 0b1111 ,
  TEET = 0b1101 , TETT = 0b1001 , TETE = 0b1011
}
 Mask values for IT and VPT Blocks, to be used by MCOperands. More...

Functions

bool isDoublePrecision (const FPURestriction restriction)
bool has32Regs (const FPURestriction restriction)
ArchKindoperator-- (ArchKind &Kind)
LLVM_ABI StringRef getFPUName (FPUKind FPUKind)
LLVM_ABI FPUVersion getFPUVersion (FPUKind FPUKind)
LLVM_ABI NeonSupportLevel getFPUNeonSupportLevel (FPUKind FPUKind)
LLVM_ABI FPURestriction getFPURestriction (FPUKind FPUKind)
LLVM_ABI bool getFPUFeatures (FPUKind FPUKind, std::vector< StringRef > &Features)
LLVM_ABI bool getHWDivFeatures (uint64_t HWDivKind, std::vector< StringRef > &Features)
LLVM_ABI bool getExtensionFeatures (uint64_t Extensions, std::vector< StringRef > &Features)
LLVM_ABI StringRef getArchName (ArchKind AK)
LLVM_ABI unsigned getArchAttr (ArchKind AK)
LLVM_ABI StringRef getCPUAttr (ArchKind AK)
LLVM_ABI StringRef getSubArch (ArchKind AK)
LLVM_ABI StringRef getArchExtName (uint64_t ArchExtKind)
LLVM_ABI StringRef getArchExtFeature (StringRef ArchExt)
LLVM_ABI bool appendArchExtFeatures (StringRef CPU, ARM::ArchKind AK, StringRef ArchExt, std::vector< StringRef > &Features, FPUKind &ArgFPUKind)
LLVM_ABI ArchKind convertV9toV8 (ArchKind AK)
LLVM_ABI FPUKind getDefaultFPU (StringRef CPU, ArchKind AK)
LLVM_ABI uint64_t getDefaultExtensions (StringRef CPU, ArchKind AK)
LLVM_ABI StringRef getDefaultCPU (StringRef Arch)
LLVM_ABI StringRef getFPUSynonym (StringRef FPU)
LLVM_ABI uint64_t parseHWDiv (StringRef HWDiv)
LLVM_ABI FPUKind parseFPU (StringRef FPU)
LLVM_ABI ArchKind parseArch (StringRef Arch)
LLVM_ABI uint64_t parseArchExt (StringRef ArchExt)
LLVM_ABI ArchKind parseCPUArch (StringRef CPU)
LLVM_ABI ProfileKind parseArchProfile (StringRef Arch)
LLVM_ABI unsigned parseArchVersion (StringRef Arch)
LLVM_ABI void fillValidCPUArchList (SmallVectorImpl< StringRef > &Values)
LLVM_ABI LLVM_READONLY StringRef computeDefaultTargetABI (const Triple &TT)
LLVM_ABI LLVM_READONLY ARMABI computeTargetABI (const Triple &TT, StringRef ABIName="")
LLVM_ABI StringRef getARMCPUForArch (const llvm::Triple &Triple, StringRef MArch={})
 Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
LLVM_ABI void PrintSupportedExtensions (StringMap< StringRef > DescMap)
LLVM_ABI StringRef getArchSynonym (StringRef Arch)
 Converts e.g. "armv8" -> "armv8-a".
LLVM_ABI StringRef getCanonicalArchName (StringRef Arch)
 MArch is expected to be of the form (arm|thumb)?(eb)?(v.
LLVM_ABI ISAKind parseArchISA (StringRef Arch)
LLVM_ABI EndianKind parseArchEndian (StringRef Arch)
LLVM_ABI bool parseBranchProtection (StringRef Spec, ParsedBranchProtection &PBP, StringRef &Err, bool EnablePAuthLR=false)
bool isBitFieldInvertedMask (unsigned v)
FastISelcreateFastISel (FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo)
static bool checkPartMapping (const RegisterBankInfo::PartialMapping &PM, unsigned Start, unsigned Length, unsigned RegBankID)
static void checkPartialMappings ()
static bool checkValueMapping (const RegisterBankInfo::ValueMapping &VM, const RegisterBankInfo::PartialMapping *BreakDown)
static void checkValueMappings ()
void printSpecifierExpr (const MCAsmInfo &MAI, raw_ostream &OS, const MCSpecifierExpr &Expr)
const MCSpecifierExprcreateUpper16 (const MCExpr *Expr, MCContext &Ctx)
const MCSpecifierExprcreateLower16 (const MCExpr *Expr, MCContext &Ctx)
const MCSpecifierExprcreateUpper8_15 (const MCExpr *Expr, MCContext &Ctx)
const MCSpecifierExprcreateUpper0_7 (const MCExpr *Expr, MCContext &Ctx)
const MCSpecifierExprcreateLower8_15 (const MCExpr *Expr, MCContext &Ctx)
const MCSpecifierExprcreateLower0_7 (const MCExpr *Expr, MCContext &Ctx)
bool isVpred (OperandType op)
bool isVpred (uint8_t op)
bool isCDECoproc (size_t Coproc, const MCSubtargetInfo &STI)

Variables

constexpr ExtName ARCHExtNames []
struct { 
   StringRef   llvm::ARM::Name 
   uint64_t   llvm::ARM::ID 
HWDivNames []
constexpr CpuNames CPUNames []
static constexpr FPUName FPUNames []
static constexpr ArchNames ARMArchNames []
const unsigned RoundingBitsPos = 22
const unsigned FPStatusBits = 0xf800009f
const unsigned FPReservedBits = 0x00006060
const RegisterBankInfo::PartialMapping PartMappings []
const RegisterBankInfo::ValueMapping ValueMappings []

Detailed Description

Define some predicates that are used for node matching.

Typedef Documentation

◆ Specifier

Definition at line 92 of file ARMMCAsmInfo.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
S_None 
S_COFF_SECREL 
S_HI16 
S_LO16 
S_HI_8_15 
S_HI_0_7 
S_LO_8_15 
S_LO_0_7 
S_ARM_NONE 
S_FUNCDESC 
S_GOT 
S_GOTFUNCDESC 
S_GOTOFF 
S_GOTOFFFUNCDESC 
S_GOTTPOFF 
S_GOTTPOFF_FDPIC 
S_GOT_PREL 
S_PLT 
S_PREL31 
S_SBREL 
S_TARGET1 
S_TARGET2 
S_TLSCALL 
S_TLSDESC 
S_TLSDESCSEQ 
S_TLSGD 
S_TLSGD_FDPIC 
S_TLSLDM 
S_TLSLDM_FDPIC 
S_TLSLDO 
S_TPOFF 

Definition at line 93 of file ARMMCAsmInfo.h.

◆ ArchExtKind

Enumerator
AEK_INVALID 
AEK_NONE 
AEK_CRC 
AEK_CRYPTO 
AEK_FP 
AEK_HWDIVTHUMB 
AEK_HWDIVARM 
AEK_MP 
AEK_SIMD 
AEK_SEC 
AEK_VIRT 
AEK_DSP 
AEK_FP16 
AEK_RAS 
AEK_DOTPROD 
AEK_SHA2 
AEK_AES 
AEK_FP16FML 
AEK_SB 
AEK_FP_DP 
AEK_LOB 
AEK_BF16 
AEK_I8MM 
AEK_CDECP0 
AEK_CDECP1 
AEK_CDECP2 
AEK_CDECP3 
AEK_CDECP4 
AEK_CDECP5 
AEK_CDECP6 
AEK_CDECP7 
AEK_PACBTI 
AEK_MVE 
AEK_OS 
AEK_IWMMXT 
AEK_IWMMXT2 
AEK_MAVERICK 
AEK_XSCALE 

Definition at line 39 of file ARMTargetParser.h.

◆ ArchKind

enum class llvm::ARM::ArchKind
strong
Enumerator
ARM_FPU 

Definition at line 106 of file ARMTargetParser.h.

◆ ARMABI

Enumerator
ARM_ABI_UNKNOWN 
ARM_ABI_APCS 
ARM_ABI_AAPCS 
ARM_ABI_AAPCS16 

Definition at line 30 of file ARMTargetParser.h.

◆ DW_ISA

Enumerator
DW_ISA_ARM_thumb 
DW_ISA_ARM_arm 

Definition at line 25 of file ARMAsmPrinter.h.

◆ EndianKind

enum class llvm::ARM::EndianKind
strong
Enumerator
INVALID 
LITTLE 
BIG 

Definition at line 24 of file ARMTargetParserCommon.h.

◆ Fixups

Enumerator
fixup_arm_ldst_pcrel_12 
fixup_t2_ldst_pcrel_12 
fixup_arm_pcrel_10_unscaled 
fixup_arm_pcrel_10 
fixup_t2_pcrel_10 
fixup_arm_pcrel_9 
fixup_t2_pcrel_9 
fixup_arm_ldst_abs_12 
fixup_thumb_adr_pcrel_10 
fixup_arm_adr_pcrel_12 
fixup_t2_adr_pcrel_12 
fixup_arm_condbranch 
fixup_arm_uncondbranch 
fixup_t2_condbranch 
fixup_t2_uncondbranch 
fixup_arm_thumb_br 
fixup_arm_uncondbl 
fixup_arm_condbl 
fixup_arm_blx 
fixup_arm_thumb_bl 
fixup_arm_thumb_blx 
fixup_arm_thumb_cb 
fixup_arm_thumb_cp 
fixup_arm_thumb_bcc 
fixup_arm_movt_hi16 
fixup_arm_movw_lo16 
fixup_t2_movt_hi16 
fixup_t2_movw_lo16 
fixup_arm_thumb_upper_8_15 
fixup_arm_thumb_upper_0_7 
fixup_arm_thumb_lower_8_15 
fixup_arm_thumb_lower_0_7 
fixup_arm_mod_imm 
fixup_t2_so_imm 
fixup_bf_branch 
fixup_bf_target 
fixup_bfl_target 
fixup_bfc_target 
fixup_bfcsel_else_target 
fixup_wls 
fixup_le 
LastTargetFixupKind 
NumTargetFixupKinds 

Definition at line 16 of file ARMFixupKinds.h.

◆ FPUKind

Enumerator
ARM_FPU 
ARM_FPU 

Definition at line 131 of file ARMTargetParser.h.

◆ FPURestriction

enum class llvm::ARM::FPURestriction
strong
Enumerator
None 

No restriction.

D16 

Only 16 D registers.

SP_D16 

Only single-precision instructions, with 16 D registers.

Definition at line 149 of file ARMTargetParser.h.

◆ FPUVersion

enum class llvm::ARM::FPUVersion
strong
Enumerator
NONE 
VFPV2 
VFPV3 
VFPV3_FP16 
VFPV4 
VFPV5 
VFPV5_FULLFP16 

Definition at line 138 of file ARMTargetParser.h.

◆ ISAKind

enum class llvm::ARM::ISAKind
strong
Enumerator
INVALID 
ARM 
THUMB 
AARCH64 

Definition at line 22 of file ARMTargetParserCommon.h.

◆ NeonSupportLevel

enum class llvm::ARM::NeonSupportLevel
strong
Enumerator
None 

No Neon.

Neon 

Neon.

Crypto 

Neon with Crypto.

Definition at line 164 of file ARMTargetParser.h.

◆ OperandType

Enumerator
OPERAND_VPRED_R 
OPERAND_VPRED_N 

Definition at line 114 of file ARMMCTargetDesc.h.

◆ PartialMappingIdx

Enumerator
PMI_GPR 
PMI_SPR 
PMI_DPR 
PMI_Min 

Definition at line 31 of file ARMRegisterBankInfo.cpp.

◆ PredBlockMask

enum class llvm::ARM::PredBlockMask
strong

Mask values for IT and VPT Blocks, to be used by MCOperands.

Note that this is different from the "real" encoding used by the instructions. In this encoding, the lowest set bit indicates the end of the encoding, and above that, "1" indicates an else, while "0" indicates a then. Tx = x100 Txy = xy10 Txyz = xyz1

Enumerator
TT 
TE 
TTT 
TTE 
TEE 
TET 
TTTT 
TTTE 
TTEE 
TTET 
TEEE 
TEET 
TETT 
TETE 

Definition at line 105 of file ARMBaseInfo.h.

◆ ProfileKind

enum class llvm::ARM::ProfileKind
strong
Enumerator
INVALID 

Definition at line 171 of file ARMTargetParser.h.

◆ Rounding

Possible values of current rounding mode, which is specified in bits 23:22 of FPSCR.

Enumerator
RN 
RP 
RM 
RZ 
rmMask 

Definition at line 370 of file ARMISelLowering.h.

◆ ValueMappingIdx

Enumerator
InvalidIdx 
GPR3OpsIdx 
SPR3OpsIdx 
DPR3OpsIdx 

Definition at line 68 of file ARMRegisterBankInfo.cpp.

Function Documentation

◆ appendArchExtFeatures()

bool llvm::ARM::appendArchExtFeatures ( StringRef CPU,
ARM::ArchKind AK,
StringRef ArchExt,
std::vector< StringRef > & Features,
ARM::FPUKind & ArgFPUKind )

◆ checkPartialMappings()

void llvm::ARM::checkPartialMappings ( )
static

◆ checkPartMapping()

◆ checkValueMapping()

◆ checkValueMappings()

void llvm::ARM::checkValueMappings ( )
static

◆ computeDefaultTargetABI()

◆ computeTargetABI()

◆ convertV9toV8()

ARM::ArchKind llvm::ARM::convertV9toV8 ( ARM::ArchKind AK)

Definition at line 480 of file ARMTargetParser.cpp.

References A, and getProfileKind().

◆ createFastISel()

◆ createLower0_7()

const MCSpecifierExpr * llvm::ARM::createLower0_7 ( const MCExpr * Expr,
MCContext & Ctx )

Definition at line 215 of file ARMMCAsmInfo.cpp.

References llvm::MCSpecifierExpr::create(), and S_LO_0_7.

◆ createLower16()

const MCSpecifierExpr * llvm::ARM::createLower16 ( const MCExpr * Expr,
MCContext & Ctx )

Definition at line 197 of file ARMMCAsmInfo.cpp.

References llvm::MCSpecifierExpr::create(), and S_LO16.

Referenced by llvm::ARMAsmPrinter::emitInstruction().

◆ createLower8_15()

const MCSpecifierExpr * llvm::ARM::createLower8_15 ( const MCExpr * Expr,
MCContext & Ctx )

Definition at line 210 of file ARMMCAsmInfo.cpp.

References llvm::MCSpecifierExpr::create(), and S_LO_8_15.

◆ createUpper0_7()

const MCSpecifierExpr * llvm::ARM::createUpper0_7 ( const MCExpr * Expr,
MCContext & Ctx )

Definition at line 206 of file ARMMCAsmInfo.cpp.

References llvm::MCSpecifierExpr::create(), and S_HI_0_7.

◆ createUpper16()

const MCSpecifierExpr * llvm::ARM::createUpper16 ( const MCExpr * Expr,
MCContext & Ctx )

Definition at line 193 of file ARMMCAsmInfo.cpp.

References llvm::MCSpecifierExpr::create(), and S_HI16.

Referenced by llvm::ARMAsmPrinter::emitInstruction().

◆ createUpper8_15()

const MCSpecifierExpr * llvm::ARM::createUpper8_15 ( const MCExpr * Expr,
MCContext & Ctx )

Definition at line 201 of file ARMMCAsmInfo.cpp.

References llvm::MCSpecifierExpr::create(), and S_HI_8_15.

◆ fillValidCPUArchList()

void llvm::ARM::fillValidCPUArchList ( SmallVectorImpl< StringRef > & Values)

◆ getArchAttr()

◆ getArchExtFeature()

StringRef llvm::ARM::getArchExtFeature ( StringRef ArchExt)

Definition at line 358 of file ARMTargetParser.cpp.

References ARCHExtNames, and stripNegationPrefix().

◆ getArchExtName()

StringRef llvm::ARM::getArchExtName ( uint64_t ArchExtKind)

Definition at line 346 of file ARMTargetParser.cpp.

References ARCHExtNames.

◆ getArchName()

StringRef llvm::ARM::getArchName ( ARM::ArchKind AK)

Definition at line 330 of file ARMTargetParser.cpp.

References ARMArchNames, and Name.

Referenced by llvm::ARM_MC::ParseARMTriple().

◆ getArchSynonym()

StringRef llvm::ARM::getArchSynonym ( StringRef Arch)

◆ getARMCPUForArch()

◆ getCanonicalArchName()

StringRef llvm::ARM::getCanonicalArchName ( StringRef Arch)

MArch is expected to be of the form (arm|thumb)?(eb)?(v.

+)?(eb)?, but (iwmmxt|xscale)(eb)? is also permitted. If the former, return "v.+", if the latter, return unmodified string, minus 'eb'. If invalid, return empty string.

Definition at line 55 of file ARMTargetParserCommon.cpp.

References A, and llvm::StringRef::npos.

Referenced by getARMCPUForArch(), llvm::AArch64::parseArch(), parseArch(), parseArchProfile(), parseArchVersion(), parseARMArch(), and parseSubArch().

◆ getCPUAttr()

StringRef llvm::ARM::getCPUAttr ( ARM::ArchKind AK)

Definition at line 334 of file ARMTargetParser.cpp.

References ARMArchNames.

◆ getDefaultCPU()

StringRef llvm::ARM::getDefaultCPU ( StringRef Arch)

Definition at line 491 of file ARMTargetParser.cpp.

References CPUNames, and parseArch().

Referenced by getARMCPUForArch().

◆ getDefaultExtensions()

uint64_t llvm::ARM::getDefaultExtensions ( StringRef CPU,
ARM::ArchKind AK )

◆ getDefaultFPU()

ARM::FPUKind llvm::ARM::getDefaultFPU ( StringRef CPU,
ARM::ArchKind AK )

Definition at line 271 of file ARMTargetParser.cpp.

References ARMArchNames, and llvm::StringSwitch< T, R >::Default().

Referenced by appendArchExtFeatures().

◆ getExtensionFeatures()

bool llvm::ARM::getExtensionFeatures ( uint64_t Extensions,
std::vector< StringRef > & Features )

Definition at line 314 of file ARMTargetParser.cpp.

References AEK_INVALID, ARCHExtNames, Extensions, and getHWDivFeatures().

◆ getFPUFeatures()

bool llvm::ARM::getFPUFeatures ( ARM::FPUKind FPUKind,
std::vector< StringRef > & Features )

Definition at line 156 of file ARMTargetParser.cpp.

References Crypto, D16, FPUNames, Neon, None, SP_D16, VFPV2, VFPV3, VFPV3_FP16, VFPV4, VFPV5, and VFPV5_FULLFP16.

◆ getFPUName()

StringRef llvm::ARM::getFPUName ( ARM::FPUKind FPUKind)

Definition at line 253 of file ARMTargetParser.cpp.

References FPUNames.

◆ getFPUNeonSupportLevel()

ARM::NeonSupportLevel llvm::ARM::getFPUNeonSupportLevel ( ARM::FPUKind FPUKind)

Definition at line 230 of file ARMTargetParser.cpp.

References FPUNames, and None.

◆ getFPURestriction()

ARM::FPURestriction llvm::ARM::getFPURestriction ( ARM::FPUKind FPUKind)

Definition at line 265 of file ARMTargetParser.cpp.

References FPUNames, and None.

Referenced by appendArchExtFeatures().

◆ getFPUSynonym()

◆ getFPUVersion()

ARM::FPUVersion llvm::ARM::getFPUVersion ( ARM::FPUKind FPUKind)

Definition at line 259 of file ARMTargetParser.cpp.

References FPUNames, and NONE.

◆ getHWDivFeatures()

bool llvm::ARM::getHWDivFeatures ( uint64_t HWDivKind,
std::vector< StringRef > & Features )

Definition at line 295 of file ARMTargetParser.cpp.

References AEK_HWDIVARM, AEK_HWDIVTHUMB, and AEK_INVALID.

Referenced by getExtensionFeatures().

◆ getSubArch()

StringRef llvm::ARM::getSubArch ( ARM::ArchKind AK)

Definition at line 338 of file ARMTargetParser.cpp.

References ARMArchNames, and getSubArch().

Referenced by getSubArch().

◆ has32Regs()

bool llvm::ARM::has32Regs ( const FPURestriction restriction)
inline

Definition at line 159 of file ARMTargetParser.h.

References None.

Referenced by findDoublePrecisionFPU().

◆ isBitFieldInvertedMask()

bool llvm::ARM::isBitFieldInvertedMask ( unsigned v)

Definition at line 20864 of file ARMISelLowering.cpp.

References llvm::isShiftedMask_32().

Referenced by PerformORCombineToBFI().

◆ isCDECoproc()

bool llvm::ARM::isCDECoproc ( size_t Coproc,
const MCSubtargetInfo & STI )

Definition at line 759 of file ARMMCTargetDesc.cpp.

References llvm::MCSubtargetInfo::getFeatureBits().

◆ isDoublePrecision()

bool llvm::ARM::isDoublePrecision ( const FPURestriction restriction)
inline

Definition at line 155 of file ARMTargetParser.h.

References SP_D16.

Referenced by appendArchExtFeatures(), findDoublePrecisionFPU(), and findSinglePrecisionFPU().

◆ isVpred() [1/2]

bool llvm::ARM::isVpred ( OperandType op)
inline

◆ isVpred() [2/2]

bool llvm::ARM::isVpred ( uint8_t op)
inline

Definition at line 121 of file ARMMCTargetDesc.h.

References isVpred(), and op.

◆ operator--()

ArchKind & llvm::ARM::operator-- ( ArchKind & Kind)
inline

Definition at line 219 of file ARMTargetParser.h.

References assert().

◆ parseArch()

◆ parseArchEndian()

ARM::EndianKind llvm::ARM::parseArchEndian ( StringRef Arch)

◆ parseArchExt()

uint64_t llvm::ARM::parseArchExt ( StringRef ArchExt)

Definition at line 515 of file ARMTargetParser.cpp.

References A, AEK_INVALID, and ARCHExtNames.

Referenced by appendArchExtFeatures().

◆ parseArchISA()

ARM::ISAKind llvm::ARM::parseArchISA ( StringRef Arch)

◆ parseArchProfile()

ARM::ProfileKind llvm::ARM::parseArchProfile ( StringRef Arch)

Definition at line 151 of file ARMTargetParser.cpp.

References getCanonicalArchName(), getProfileKind(), and parseArch().

Referenced by computeDefaultTargetABI(), and parseARMArch().

◆ parseArchVersion()

unsigned llvm::ARM::parseArchVersion ( StringRef Arch)

Definition at line 42 of file ARMTargetParser.cpp.

References getCanonicalArchName(), llvm_unreachable, and parseArch().

Referenced by getARMCPUForArch(), and parseARMArch().

◆ parseBranchProtection()

◆ parseCPUArch()

ARM::ArchKind llvm::ARM::parseCPUArch ( StringRef CPU)

Definition at line 523 of file ARMTargetParser.cpp.

References llvm::CallingConv::C, and CPUNames.

◆ parseFPU()

ARM::FPUKind llvm::ARM::parseFPU ( StringRef FPU)

Definition at line 221 of file ARMTargetParser.cpp.

References F, FPUNames, and getFPUSynonym().

◆ parseHWDiv()

uint64_t llvm::ARM::parseHWDiv ( StringRef HWDiv)

Definition at line 506 of file ARMTargetParser.cpp.

References AEK_INVALID, D(), getHWDivSynonym(), and HWDivNames.

◆ printSpecifierExpr()

◆ PrintSupportedExtensions()

void llvm::ARM::PrintSupportedExtensions ( StringMap< StringRef > DescMap)

Variable Documentation

◆ ARCHExtNames

ExtName llvm::ARM::ARCHExtNames[]
constexpr

◆ ARMArchNames

ArchNames llvm::ARM::ARMArchNames[]
staticconstexpr
Initial value:
= {
#define ARM_ARCH(NAME, ID, CPU_ATTR, ARCH_FEATURE, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT)
\
\
}

Definition at line 211 of file ARMTargetParser.h.

Referenced by getArchAttr(), getArchName(), getCPUAttr(), getDefaultExtensions(), getDefaultFPU(), getSubArch(), and parseArch().

◆ CPUNames

CpuNames llvm::ARM::CPUNames[]
constexpr

Definition at line 124 of file ARMTargetParser.h.

Referenced by fillValidCPUArchList(), getDefaultCPU(), and parseCPUArch().

◆ FPReservedBits

const unsigned llvm::ARM::FPReservedBits = 0x00006060

Definition at line 387 of file ARMISelLowering.h.

Referenced by llvm::ARMLegalizerInfo::legalizeCustom().

◆ FPStatusBits

const unsigned llvm::ARM::FPStatusBits = 0xf800009f

Definition at line 383 of file ARMISelLowering.h.

Referenced by llvm::ARMLegalizerInfo::legalizeCustom().

◆ FPUNames

FPUName llvm::ARM::FPUNames[]
staticconstexpr
Initial value:
= {
#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
}

Definition at line 185 of file ARMTargetParser.h.

Referenced by findDoublePrecisionFPU(), findSinglePrecisionFPU(), getFPUFeatures(), getFPUName(), getFPUNeonSupportLevel(), getFPURestriction(), getFPUVersion(), and parseFPU().

◆ [struct]

struct { ... } llvm::ARM::HWDivNames[]

Referenced by parseHWDiv().

◆ ID

uint64_t llvm::ARM::ID

Definition at line 99 of file ARMTargetParser.h.

Referenced by appendArchExtFeatures().

◆ Name

StringRef llvm::ARM::Name

Definition at line 98 of file ARMTargetParser.h.

Referenced by getArchName().

◆ PartMappings

const RegisterBankInfo::PartialMapping llvm::ARM::PartMappings[]
Initial value:
{
{0, 32, GPRRegBank},
{0, 32, FPRRegBank},
{0, 64, FPRRegBank},
}

Definition at line 38 of file ARMRegisterBankInfo.cpp.

Referenced by checkPartialMappings(), and checkValueMappings().

◆ RoundingBitsPos

const unsigned llvm::ARM::RoundingBitsPos = 22

Definition at line 379 of file ARMISelLowering.h.

◆ ValueMappings