ZVT PWM DC/DC Boost Converter Design
ZVT PWM DC/DC Boost Converter Design
DO NGUYEN NGHIA
Date: May 8, 2016
iii
Table of Contents
iv
List of Tables and Figures
v
1.0 Introduction
Pulse width modulated (PWM) DC/DC converters are widely used in a variety of applications due
to their ease of control and modification, however their use in higher frequency applications are
limited due to their the significant amount of noise interference and losses that occur. Because of
this, soft-switching techniques have become popular to reduce these losses at higher
frequencies.
This report documents a student project where the goal is to design and build a zero voltage
transition, pulse width modulated DC/DC boost converter with a fixed output of 48VDC. The
snubber cell used to implement the soft switching techniques is relatively new where the main
transistor is switched under zero voltage and the auxiliary transistor is switched under zero
current. The snubber cell is also relatively low cost.
By implementing this snubber cell, the increase in efficiency allows for use in applications such as
fuel cell–powered electric vehicles. A dc/dc converter is needed to interface the low-voltage
batteries with the fuel cell powered higher voltage dc bus system.
This report details the design method used to meet the project specifications. It also analyzes the
functionality, efficiency, and cost of the implemented converter, and recommends changes for
future implementations.
6
3.1.1 Theory of Circuit Operation
A conventional PWM boost converter is shown below in Figure 1.
There are two stages of operation for the boost converter; stage 1: the switch is on, and stage 2:
the switch is off. These two stages are shown below in Figures 2 and 3.
When MOSFET M1 is turned off in stage 2, inductor Lb opposes any drop in current by
immediately reversing its electromotive force (EMF) so that the inductor’s voltage adds to the
source voltage. The inductor voltage is now Vin-Vout and iL(t) is given by:
1
iL (t ) = (Vin - Vout )(t - DT ) + I L ( DT ) for DT �t < T (2)
L
By solving equations (1) and (2) at t=DT and t=T respectively, and assuming I L (T ) = I L (0) , the
duty cycle, or ratio between input and output voltage can be found as follows:
7
1 1
iL (t = DT ) = Vin DT + I L (0) � I L ( DT ) - I L (0) = Vin DT
L L
1 1
iL (t = T ) = (Vin - Vout )(T - DT ) + I L ( DT ) � I L ( DT ) - I L (0) = (Vin - Vout )(1 - D)T
L L
Vout 1
= (3)
Vin 1 - D
By assuming an ideal converter with no losses, the average input and output powers must be
equal. In other words:
Vout I 1
Vin I in = Vout I out or = in = .
Vin I out 1 - D
I +I V
Also, I out = I in (1 - D) = L ,max L,min (1 - D ) = out (4)
2 RL
By solving equations (1) and (2) for minimum and maximum current values, the minimum inductor
value that will keep the boost converter in continuous conduction mode (CCM) can be calculated
using equation (4) as follows:
� 1 DT �
I L,min = I L (0) = Vin � - �
�RL (1 - D)
2
2L �
� 1 DT �
I L,max = I L ( DT ) = Vin � + �
�RL (1 - D)
2
2L �
RT
Setting I L ,min = 0 , Lcrit = L (1 - D) D
2
(5)
2
3.1.2 Design Calculations
As discussed in section 2.0: Project Goal and Specifications, the ZVT-PWM DC/DC Boost
converter has the following specifications:
Vin = 18V – 30V DC
Vout = 48V DC
fs = 200kHz
P=250W
Given the input voltage range of 18 – 30 V, the duty cycle D can be calculated as follows:
Vin
D = 1-
Vout
18V 30V
D = 1- = 0.625 , and D = 1 - = 0.375
48V 48V
Using the max output power specification of 250W, the minimum resistive load can be calculated
as follows:
V2
P=
RL
V 2 (48V ) 2
RL = = = 9.216W
P 250W
Initial calculations are done using a switching frequency of 100 kHz which leads to a period
T=1/fs=1e-5s. The inductor Lb can be calculated using the following inequality:
8
RT
Lb �Lcrit = (1 - D ) 2 D
2
(9.216W)(10-5 s )
for D=0.625 Lcrit = (1 - 0.625) 2 (0.625) = 4.05m H
2
(9.216W)(10-5 s )
for D=0.375 Lcrit = (1 - 0.375) 2 (0.375) = 6.75m H
2
\ Lb �6.75m H
N2
L=
l
m0 m r A
Where N represents the number of turns around the core. Using a core of material TDK PQ5050
PC44, and the fact that with 13 turns the inductance is measured in the laboratory to be 75.3uH,
N can be calculated using the ratio:
Using an inductance value of LB = 33.75m H , the maximum load can be calculated as follows:
RT
Lcrit = (1 - D) 2 D
2
R (10-5 s)
33.75m H = (1 - 0.375) 2 (0.375)
2
R = 46.08W
In theory, the load should be no higher then R = 46.08W to ensure the circuit remains in CCM,
however in reality load should be kept at a lower value due to the potential of parasitic
resistances present in the circuit.
9
The resulting boost converter schematic is shown below in Figure 4.
10
Figure 5: Conventional Boost Converter with Snubber Cell
Stage 1
This stage begins with MOSFETs M1 (main) and M2 (auxiliary) turned off. Db is on and is
conducting current Iin of the main inductor Lb. The turn on signal is sent to transistor M2 from the
microprocessor at which time Dr and M2 are turned on at near ZCS. The rate of rise of the
current through Dr and M2 is limited by the snubber inductor Lr. As the current in M2 reaches Iin,
Db current falls to zero, and thus Db turns off under ZVS.
Stage 2
Diode Db and transistor M1 are now both in the off state. V Cr=Vout. A parallel resonance between
Lr and Cr begins to resonate through the path Cr–Dr–Lr–M2 under the input current Iin and with the
initial current of ILr of the inductor Lr. When the transfer of energy stored in capacitor Cr to the
inductor Lr is completed, and the current and energy values of the inductor L r reach their
maximum level at the same time. Now only transistor M2 is on and is conducting the maximum
current of the inductor Lr. Also, the VCr=0.
Stage 3
Transistor M1 receives a turn on signal and at the same time the turn on signal is removed from
transistor M2. So, M1 turns on under ZVS and conducts current Iin and M2 is turns off under near
ZVS through Cb. Serial resonance between Lr and Cb starts to resonate through Lr-Da-Cb-Dr under
the maximum inductor current. Thus, throughout this stage the energy stored in the inductor L r is
transferred to capacitor Cb. As soon as the inductor current drops to zero, auxiliary diodes D r and
Da are turned off under ZCS through Lr, and Cb is charged to Vo.
Stage 4
Transistor M1 continues to conduct input current Iin, and the snubber circuit is not active. The
duration of this stage is the ‘on’ time of the MOSFET M1 as a traditional normally operating boost
converter and is determined by PWM control.
Stage 5
The gate signal of the main transistor M1 is removed and M1 turns off under ZVS. Auxiliary diode
Dc turns on with ZVS because of capacitor Cb being charged to Vo. During this stage Cr is
charged and Cb is discharged. When Cr voltage reaches Vo and Cb goes to zero simultaneously,
diode Db is turned on with ZVS and the auxiliary diode Dc is turned off with ZVS. Thus, C b
restricts the rise rate of transistor M1 voltage and M1 is turned off under near ZVS.
Stage 6
11
Main diode Db continues conducting the input current Iin and the snubber circuit is not active. This
stages duration is the ‘off’ time of the transistor M1 as in a conventional PWM boost converter. At
the end of stage 6, stage 1 would again begin starting another switching cycle.
Let Lr = 75nH
Let CB = 7nF
These values of Cr, Cb, and Lr also satisfy the following equation:
1 1 1
Lr ( I in ,max + I rr ,max ) 2 + CrVo2 @ CBVo2
2 2 2
A reference voltage of 2.5V required by the control circuit is provided through a voltage divider.
R12 and R14 can be calculated as follows:
12
R14
Vo = Vref
R14 + R12
R14
(48V ) = 2.5V
R14 + R12
The purpose of the control circuit is to provide the main and auxiliary MOSFETs with gating
pulses. The main components of the control circuit are the microprocessor, the opto isolators and
the drivers. The microprocessor used was the ATMEGA8.
13
Figure 7: Control Circuit
The microprocessor was programmed to output two gating pulses. Ideally, the goal was to attain
a switching frequency of 200 kHz; however, the circuit was only tested effectively with a switching
frequency of 50 kHz. Both pulses are sent at a frequency of 50kHz with an initial duty cycle of the
main mosfet set to 50%. The first pulse is sent to the auxiliary MOSFET, with an on time of
200ns. The pulse to the main MOSFET is sent when the pulse to the auxiliary MOSFET ends.
A feedback loop is implemented to ensure a constant 48V is obtained at the output for any input
between 18-30VDC. The microprocessor is programmed to automatically adjust the duty cycle
according to a comparison made between a reference voltage of 2.5V and a feedback signal from
a voltage divider at the output. This comparison makes use of the ATMEGA8 analog to digital
converter. The voltage divider (shown in Figure 6 as R12 and R14) is designed such that at the
desired output of 48V the feedback signal is 2.5V and no adjustment of the duty cycle is made. If
the output voltage is greater than 48V the duty cycle is decreased until the desired output voltage
is obtained. If the output voltage is less than 48V the duty cycle is increased until the desired
output is obtained. The microprocessor continuously loops through this code adjusting the output
voltage according to the variance in the input voltage. After each loop the reference is checked
again to ensure the output voltage is maintained.
A 16MHz crystal was used as a clock source for the microprocessor. This crystal was chosen as it
is the fastest that can be used with the ATMEGA8, and allows the sending of pulses to be done
as quickly as possible. To calculate the number of cycles needed for each pulse, the execution
time of each instruction was calculated and the corresponding numbers of instructions were used
to make each pulse the appropriate length. The calculation of pulse lengths can be seen below in
section 3.3.1 Design Calculations.
14
The following flow diagram maps the events programmed to take place in the microprocessor:
Initialize microprocessor
Initialize Interrupts
Declare Variables
Output Pulses
Read A to D Converter
YES
NO
YES
15
3.3.1 Design Calculations:
Using the 6 operation stages (as described in 3.2.2: Theory of Circuit Operation), the following
calculations were made to determine the required on and off times of the MOSFETs. These
stages were chosen based on the waveforms in Figure 9. These calculations were based on the
project specifications, with an ideal switching frequency of 200 kHz.
iT1 = 0
1
A New ZVT-PWM DC–DC Converter Hacý Bodur, Member, IEEE, and A. Faruk Bakan. IEEE
TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO. 1, JANUARY 2002
16
iT2 = 0
iDF = I i
vCr = Vo
vCB = 0
Using the values calculated in the design section, for this stage we find the time to be:
Lr 78nH L
t01 = Ii = 9.6 A = 15.6ns and t12 = trr = r I rr
Vo 48V Vo
trr was found to be 5ns, obtained from data sheets. Therefore the time for stage 1 is
t02 = 15.6ns + 5ns = 20.6ns
Vo � 48 �
t23 = Lr Cr arctg = (3.418nF )(75nH )arctg � �= 21.77ns
Z1 I rr �(4.68)(3.2) �
Where Z1 = Lr Cr = 4.68W
The on time of the auxiliary transistor was calculated to be 42.37ns. This is the minimum time the
auxiliary MOSFET needs to be on. To ensure the MOSFET was conducting for a long enough
period of time, the auxiliary pulse was set at 200ns, as suggested by Dr. Bhat, project supervisor.
The on time for the main MOSFET was calculated using the operation frequency, 50 kHz, and a
50% duty cycle.
For a duty cycle of 50%, the on and off time must be equal. Therefore:
This can be seen in the oscilloscope print out of the gating pulses below in Figure 10.
17
Figure 10: Gating Pulses
18
Table 1: Voltage and Current Measurements and Resulting Efficiency and Various
Resistive Loads
Load (ohm) Vin (V) Iin (A) Vout (V) Iout (A) η (%)
30 18.00 4.58 48.00 1.62 94.32
20.10 4.10 48.00 1.63 94.94
24.45 3.34 48.00 1.63 95.81
28.08 2.89 48.00 1.64 97.00
20 18.00 7.04 48.00 2.47 93.56
20.40 6.12 48.00 2.45 94.19
24.80 4.99 48.00 2.46 95.42
28.30 4.30 48.00 2.45 96.64
15 18.24 9.32 48.00 3.25 91.77
20.70 8.10 48.00 3.26 93.33
25.00 6.59 48.00 3.26 94.98
28.54 5.72 48.00 3.26 95.85
10 19.00 13.20 48.00 4.85 92.82
20.15 12.39 48.00 4.84 93.06
25.00 9.80 48.00 4.83 94.63
28.50 8.50 48.00 4.83 95.70
Average η: 94.63
Figure 11: Efficiency vs. Input Voltage for Various Resistive Loads
As shown in Table 1 and Figure 11, as the resistive load decreases the efficiency decreases (and
output power increases). It can also be seen that as the input voltage increases the efficiency
also increases. Overall, the ZVT-PWM DC/DC Boost Converter resulted in an average efficiency
of 94.63%.
Figure 12 below shows waveforms resulting from the ZVT-PWM DC/DC Boost Converter with a
resistive load addition of 30Ω. Channel 1 represents the main MOSFET (M1) between drain and
source channels. Channel 2 represents the main diode Db. Channel 3 represents the pulse from
the microprocessor to the gate of the main MOSFET (M1), and Channel 4 represents the pulse
from the microprocessor to the gate of the auxiliary MOSFET (M2).
19
Figure 12: Waveforms with Resistive Load of 30
As shown in Figure 12, once the pulse is sent from the microprocessor to the main MOSFET
(M1), the main MOSFET is turned on under near Zero Voltage Switching (ZVS). Furthermore,
once the main pulse is turned off, the main MOSFET turns off under near ZVS. At this point, the
main diode (Db) turns on under near ZVS (Please note that while the waveforms of the main
MOSFET and main diode may appear to follow each other, they are reverse given the location of
the respective ‘ground’).
In Figure 13, 14 and 15 below, Channel 1 represents the voltage across the main inductor (L b)
and Channel 2 represents the pulse from the microprocessor to the main MOSFET (M1). As
shown, the pulse train in Figure 13 has a 64.1% duty cycle, the pulse train in Figure 14 has a duty
cycle of 52.5% and the pulse train in Figure 15 has a duty cycle of 41.9%.
20
Figure 14: Waveform across Inductor Lb where Vin=22.8V and Load = 30Ω
Figure 15: Waveform across Inductor Lb where Vin=28V and Load = 30Ω
For all 3 Figures, the inductor Lb charges for the duration of the pulses ‘on’ time, and discharges
into capacitor Cor for the duration of the pulses ‘off’ time.
5.0 Costs
The costs associated with the design and implementation of the ZVT-PWM DC/DC boost
converter were relatively low given the simple design of both the conventional boost converter
and snubber cell. The per unit costs are detailed below in Table 2:
Table 2: Per Unit Costs for the ZVT-PWM DC/DC Boost Converter
Component Part Number Unit Price (CAN$) Quantity Total Cost (CAN$)
21
FET Driver UC3710N 8.49 2 16.98
Optoisolator HCPL 2601 2.19 2 4.38
Power MOSFET IRF640 3.38 2 6.76
Schottkey Diode BR10100 1.59 5 7.95
5V Regulator LM7805C 0.69 2 1.38
Atmel Microprocessor ATMEGA8 4.78 1 4.78
16 MHz Crystal Oscillator CA-301 16.0000M-C 1.25 1 1.25
PCB Board 20.75 2 41.50
Miscellaneous Parts Capacitors/Resistors etc. 5.00
Total Per Unit Cost: 89.98
6.0 Conclusion
The 3 subsystems of the ZVT-PWM DC/DC Boost Converter – the conventional PWM boost
converter, the snubber cell, and the control circuit were constructed and tested in the laboratory.
The ZVT PWM boost converter proposed for this project was tested at a switching frequency of
50 kHz. This switching frequency was lower than the project goal of 200 kHz due to the inability
of the microprocessor used to generate fast enough gating pulses to the MOSFETs while
implementing the feedback loop. Other factors include the introduction of noise in the circuit as a
breadboard was used for part of the control circuit. Theoretical calculations were made and used
to select components for each of the subsystems. First each subsystem was test individually and
then the subsystems were implemented and tested together.
While the project goal included a switching frequency of 200kHz, through testing, the circuit was
confirmed functional at 50kHz. The circuit was also tested with various resistive loads and the
circuit was confirmed to be functional at a minimum of 50W, and a maximum of 250W. The
overall efficiency of the ZVT-PWM DC/DC Boost converter was calculated though measurements
taken in the laboratory to be 94.63%. With this high efficiency and relative low per unit cost of
$89.98, this ZVT-PWM DC/DC boost converter is suitable for applications such as fuel-cell
powered electric vehicles where a fixed out of 48VDC is required.
7.0 Recommendations
Even though the ZVT-PWM DC/DC converter was implemented and tested at a switching
frequency of 50kHz, the following recommendations outline what could be done to achieve the
desired switching frequency of 200kHz:
1. Use an Atmel, or other brand such a PIC microcontroller, with a clocking frequency
capability higher than 16MHz to accommodate for a higher switching frequency.
2. Use a digital programmable logic device such as an FPGA which has capabilities to
accommodate for a higher switching frequency.
3. Use a PCB for the entire control circuit to eliminate some noise inherent in using a
breadboard
22
8.0 References
I. Batarseh, Power Electronic Circuits, USA: John Wiley & Sons, Inc., 2004.
II. Hacý Bodur, nd A. Faruk Bakan. A New ZVT-PWM DC–DC Converter. IEEE
TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO. 1, JANUARY 2002
23
9.0 Appendix
Progress Report #1
Group #6
The project being undertaken by Direct Current Innovations (DCI) is to design and build a zero-
voltage-transition step-up dc-dc converter for fuel cell application. Soft switching techniques will
be used to reduce the switching losses in the power converter.
The fuel cell array voltage will be 24 V dc, Power output =250 W, Vout = 48 V dc or higher (if
possible). The switching frequency will be 200kHz, and zero voltage transition (ZVT), the method
of soft switching will be implemented to reduce switching losses. Preferred choice will be given to
a micro-controller for controlling the boost circuit (MOSFET’s); however, should this be unfeasible
an integrated circuit (IC) will be used.
DCI proposes to begin work on the converter by obtaining hardware for a hard switching boost
circuit and programming the microcontroller to send correct duration impulse (gating) signals.
The impulse signal will be fed to a ‘driver’, changing it as needed to drive the MOSFETs. The
boost converter and microcontroller will then be tested together (and reconfigured if needed).
Once hard switching boost conversion of the dc signal is obtained the soft switching circuit will be
integrated giving a zero voltage transition.
24
2 ↓
3 Poster, Website, Report
4 ↓
April 1 Presentation & Report
The progress made to date has been contact with the supervisor of the project, Dr. AKS Bhat.
Research on IEEE papers, namely that of “A New ZVT PWM Converter” from Jan 2002, and
“High Efficiency Telecom Rectifier Using Soft Switching”, from IEEE Intelec Conference 1991.
The microcontroller chip has been ‘reserved’ as Rob in the electronics lab wing has been
contacted and the controllers are expected to arrive within the week, possibly early next week
(January 31st).
Sincerely,
25
9.2 Appendix B: Progress Report #2
The implementation of a Zero Voltage Transition (ZVT) Pulse Width Modulated (PWM) DC/DC
Boost Converter is making progress with much of the design phase completed, and aspects of
the testing and implementation in progress. This progress report divides the project into 4 main
sections, and comments on the work completed, and any remaining tasks. The 4 sections are;
the boost converter, the snubber cell, the control circuit, and a miscellaneous section including
website design etc.
Prior to implementing the snubber cell, a boost converter was designed with the following
specifications:
Vin = 18V – 30V DC
Vout = 48V DC
fs = 200kHz
P=250W
Given the input voltage range of 18 – 30 V, the duty cycle D can be calculated as follows:
Vin
D = 1-
Vout
18V 30V
D = 1- = 0.625 , and D = 1 - = 0.375
48V 48V
The design problem specifies a switching frequency of 200kHz, however initial calculations are
done using 100kHz. This leads to a period T=1/fs=1e-5. The design problem also specifies a
max output power of 250W.
26
V2
P=
RL
V 2 (48V ) 2
RL = = = 9.216W
P 250W
The inductor Lb can be calculated using the following inequality: (please note that Lb �Lcrit in
order for the circuit to always operate in continuous conduction mode (CCM)).
RT
Lb �Lcrit = (1 - D ) 2 D
2
(9.216W)(10-5 s )
for D=0.625 Lcrit = (1 - 0.625) 2 (0.625) = 4.05m H
2
(9.216W)(10-5 s )
for D=0.375 Lcrit = (1 - 0.375) 2 (0.375) = 6.75m H
2
\ Lb �6.75m H
Using an inductance value of LB = 33.75m H , the maximum load can be calculated as follows:
RT
Lcrit = (1 - D) 2 D
2
R (10-5 s)
33.75m H = (1 - 0.375) 2 (0.375)
2
R = 46.08W
In theory, the load should be no higher then R = 46.08W to ensure the circuit remains in CCM,
however in reality load should be kept at a lower value due to the potential of parasitic
resistances present in the circuit.
All of the components required for the implementation of the boost converter have been obtained
with the help of Dr. Bhat and the lab technicians. Jen, Stephen, and Lauren have all been
involved in the acquisition of all of the components. Component information is as follows:
Power MOSFET: IRF640 (International Rectifier)
Schottkey Diode Db: BR10100
Zener Diode
Caps/Resistors – values as shown on circuit diagram
27
Inductor – Wound with 9 turns using a core of material TDK PQ5050 PC44.
The majority of the components have been soldered to the PCB provided by Dr. Bhat by Jen and
Stephen and full testing of the circuit is yet to be completed by Jen, Stephen and Lauren.
The snubber cell is used to decreases switching losses. The following design calculations were
completed by Lauren and Stephen.
Let Lr = 75nH
28
Let CB = 7nF
These values of Cr, Cb, and Lr also satisfy the following equation:
1 1 1
Lr ( I in ,max + I rr ,max ) 2 + CrVo2 @ CBVo2
2 2 2
In order to get a reference feedback voltage of 2.5V, R12 and R14 can be calculated as follows:
R14
Vo = Vref
R14 + R12
R14
(48V ) = 2.5V
R14 + R12
The components for the snubber cell are still in the process of being obtained by Jen, Stephen
and Lauren. The following is a list of the components required for the snubber cell that have
already been obtained.
Power MOSFET IRF640
Schottkey Diode: BR10100
Cr=4nF & Cb=7nF
Resistors (values as per above)
The above components have been soldered to the auxiliary PCB by Jen and Stephen.
As soon as the above component is realized, testing of the snubber cell will be completed by Jen,
Stephen and Lauren.
The control circuit uses an ATMEGA8 microprocessor to send pulse trains to both the main and
auxiliary MOSFETs, and to adjust the duty cycle of the pulse train depending on the input voltage.
Please see appendix 1 of this report for a schematic of the Control Circuit.
The pulse trains to both the main and aux. MOSFETs have been programmed and tested with the
use of the optoisolator and the fet driver. An external Crystal of 16MHz is used to ensure a fast
switching frequency. This task was completed by Jen and Lauren.
29
The use of the ATMEGA8 A/D is required to read a reference voltage at the output and determine
the change of pulse width required or a constant 48V output. A voltage divider as shown in
Figure 2 is used to provide a reference voltage of 2.5V when the output is indeed 48V. This
aspect of the control circuit is still in progress and is being completed by Jen.
All of the components required for the control circuit have been obtained by Jen, Stephen and
Lauren. Below is a list of the components used in the control circuit:
Atmel ATMEGA8 microprocessor and development kit.
Optoisolator HCPL 2601
FET Driver UC2710
5V Voltage Regulator LM7805C
Resistors/capacitors – values as shown on schematic
All of the above components have been soldered to both the main and aux PCB’s by Jen and
Stephen.
4. Miscellaneous
Regards,
Jen Magdalenich
Stephen Spratt
Lauren Woolstencroft
30
Appendix 1 – Control Circuit Schematic
31
9.3 Appendix C: Microcontroller Code
.include "m8def.inc"
;variables
.def temp = R16
.def temp2 = R17
.def outputH = R19
.def outputL = R18
.def SCR1 = R20
.def SCR2 = R21
.def OFFT = R22
.org 0x0000
rjmp start
start:
;set port B to output
ldi temp, 0xFF
out DDRB, temp
ldi temp, 0x00
;out DDRC, temp
out PORTB, temp
;define variables
ldi outputL, 0x00
ldi outputH, 0x02
ldi SCR1, 0x03
ldi SCR2, 0x07
ldi OFFT, 0x09
;start a to d
A2D: ldi temp, 0xC0
out ADCSR, temp
;starting pulses
pulse1: ldi temp, 0x01
out PORTB, temp
mov temp2, SCR1
p1loop: dec temp2
brne p1loop
rjmp pulse2
32
offloop:dec temp2
brne offloop
rjmp pulse1
33
9.4 Appendix D: Printed Circuit Board Layouts
34
9.5 Appendix E: Data Sheets
35
36