Chapter 4
Register Transfer and Micro-operations
The internal hardware organization of a digital computer is defined by specifying:
1. The set of registers it contains and their function.
2. The sequence of microoperations performed on the binary information stored in the registers.
3. The control signals (eg load=1) that initiates the sequence of microoperations.
Examples of microoperations: shift, count, add, clear, load
Microoperation: operation performed with data stored in registers. Microoperations are classified
into 4 categories:
● Register transfer microoperations: transfer binary information from one register to
another.
● Arithmetic microoperations: perform arithmetic operation on numeric data stored in
registers.
● Logic microoperations: perform bit manipulation operations on numeric data stored in
registers.
● Shift microoperations: perform shift operations on data stored in registers
Fig 4.2(b) Timing diagram
When clock goes from 0 → 1 at time t, P is activated and Load goes from 0 → 1
During time t: Load=1
When clock goes from 0 → 1 at time t+1, Load =1. So transfer occurs. R2(t+1) ← R1(t). Data
inputs of R2 are loaded with data outputs of R1.
During time t+1: P, Load goes from 1→0. So data transfer does not take place.
Page 102 of book
4-bit Adder (Fig. 4.6)
A=1101 (A3=1, A2=1, A1=0, A0=1)
B=1011 (B3=1, B2=0, B1=1, B0=1)
C3 C2 C1 C0
A3 A2 A1 A0
B3 B2 B1 B0
C4 S3 S2 S1 S0
Adder and Subtractor (Fig. 4.7)
When M=1, B XOR M=B XOR 1=B’
When M=0, B XOR M=B XOR 0=B
When M=0,C0=0, The circuit works as an ADDER and adds A+B
FA0=inputs: A0, B0, C0 Outputs S0, C1
FA1= inputs: A1, B1, C1 Outputs S1, C2
FA2= inputs: A2, B2, C2 Outputs S2, C3
FA3= inputs: A3, B3, C3 Outputs S3, C4
Result: C4, S3, S2, S1, S0
When M=1, C0=1 , The circuit works as a SUBTRACTOR and adds A+2’s complement of B
A3 A2 A1 A0
B3’ B2’ B1’ B0’
FA0=inputs: A0, B0’, C0 Outputs S0, C1
FA1= inputs: A1, B1’, C1 Outputs S1, C2
FA2= inputs: A2, B2’, C2 Outputs S2, C3
FA3= inputs: A3, B3’, C3 Outputs S3, C4
Result: S3, S2, S1, S0
Unsigned Numbers(A and B are positive): (range of 4 bit numbers is 0 to 15)
Let A=1101=(13)10, B=1011=(11)10
When M=0, A+B takes place and answer=11000 (if range is exceeded then C4=1 else C4=0)
When M=1 , A+ 2’s complement of B is computed. (2 cases)
If A>=B then answer =10010. Ignore carry(C4). Answer=0010
If A<B then answer=1110. Answer is in 2’s complement form. Answer= (-2)10
Signed Numbers: 4 cases are considered provided there is no overflow. Negative number is
represented in 2’s complement form.
(range of 4 bits = -8 to +7)
1. A=+5 (0 101), B=+2 (0 010)
A-B= +5-(+2)=0101+1101+1=10011 (ignore C4), Result=0011=3
2. A=+5 (0 101), B= -2 (1110)
A-B= +5 – ( -2)= 0101+0001+1=0111 Result=0111=7
3. A= -5 (1 011), B=+2 (0 010)
A-B= -5 – (+2)=1011+1101+1=11001(ignore C4)=1001, Result is negative and is in 2’s
complement form = (-7)
4. A= -5 (1 011), B= -2 (1110)
A-B= -5 – (-2)=1011+0001+1=1101, Result is negative and is in 2’s complement form
=(-3)
Explanation of 4-bit arithmetic circuit
Refer Figure 4.9 and Table 4.4
Explanation
Figure 4.9 depicts 4 multiplexers (MUX) and 4 full adders (FA). Output line of MUX is
connected as input to FA. Based on the values of selection lines, output of multiplexers is as
follows:
S1 S0 MUX0 MUX1 MUX2 MUX3
0 0 B0 B1 B2 B3
0 1 B0’ B1’ B2’ B3’
1 0 0 0 0 0
1 1 1 1 1 1
Full adder has 3 inputs (2 bits to add and a carry) and two outputs (sum and carry).
Input Output
FA0 A0,Y0,Cin D0, C1
FA1 A1,Y1,C1 D1, C2
FA2 A2,Y2,C2 D2, C3
FA3 A3,Y3,C3 D3, Cout
Now refer to table 4.4
Cin may be 1 or 0.
S1 S0 Cin FA3 FA2 FA1 FA0 Microoperation
0 0 0 A3+B3+C3 A2+B2+C2 A1+B1+C1 A0+B0+0 ADD
0 0 1 A3+B3+C3 A2+B2+C2 A1+B1+C1 A0+B0+1 ADD with carry
0 1 0 A3+B3’+C3 A2+B2’+C2 A1+B1’+C1 A0+B0’+0 Subtract with
borrow
0 1 1 A3+B3’+C3 A2+B2’+C2 A1+B1’+C1 A0+B0’+1 Subtract
1 0 0 A3+0+C3 A2+0+C2 A1+0+C1 A0+0+0 Transfer A
1 0 1 A3+0+C3 A2+0+C2 A1+0+C1 A0+0+1 Increment A
1 1 0 A3+1+C3 A2+1+C2 A1+1+C1 A0+1+0 Decrement A
1 1 1 A3+1+C3 A2+1+C2 A1+1+C1 A0+1+1 Transfer A
Example: Let A=1101, B=1001
ADD
FA3 FA2 FA1 FA0
C3 C2 C1 0
A3 A2 A1 A0
B3 B2 B1 B0
Cout D3 D2 D1 D0
0 0 1 0
1 1 0 1
1 0 0 1
1 0 1 1 0
ADD with Carry
C3 C2 C1 1
A3 A2 A1 A0
B3 B2 B1 B0
Cout D3 D2 D1 D0
Subtract with borrow:
A+B’ =(A-1)-B (Since a borrow is taken by A0 from the number on right hand side, therefore
A=A-1)
A+B’=1101+0110=0011
(A-1)-B = (1101-1)-1001
1100 – 1001=0011
A+B’+0=A+B’=A3 A2 A1 A0+(1111 - B3 B2 B1 B0). Since 1111=2’s complement of decimal
value +1 ( +1=0001, 2’s complement=1110+1=1111), therefore 1111(binary)= -1 (decimal).
So the expression A+B’ =A+((-1 - B)=(A-1)-B. Eg. Let A=1100, B=0101. B’=1010,
A+B’=1100+1010=10110, where Cout=1 (can be discarded). D3 D2 D1 D0=0110=(A-1)-B (1100-
1)-0101=1011-0101=0110)
Example (76 -28)=(75-28) if the borrow is taken by number on right hand side
C3 C2 C1 0
A3 A2 A1 A0
B3’ B2’ B1’ B0’
Cout D3 D2 D1 D0
Subtract: A+B’+1=A3 A2 A1 A0+((B3’ B2’ B1’ B0’)+1)=A+2’s complement of B=A-B. In the
result, Cout may be discarded.
C3 C2 C1
A3 A2 A1 A0
B3’ B2’ B1’ B0’
1 (Cin)
Cout D3 D2 D1 D0
Transfer A: A+0000+0=A
C3 C2 C1 0
A3 A2 A1 A0
0 0 0 0
Cout D3 D2 D1 D0
Increment A: A+0000+1=A+1
C3 C2 C1
A3 A2 A1 A0
0 0 0 0
1 (Cin)
Cout D3 D2 D1 D0
Decrement A: A+1111+0=A+(2’s complement of +1)+0=A+(-1)+0=A-1
C3 C2 C1 0 +1=0001 1110+1=1111(2’s comp)
A3 A2 A1 A0
1 1 1 1
Cout D3 D2 D1 D0
1101+1111=1100
1101-1=1100
Transfer A: A+1111+1=A+(2’ complement of +1)+1=A+(-1)+1=A-1+1=A
C3 C2 C1 1
A3 A2 A1 A0
1 1 1 1
Cout D3 D2 D1 D0
Logic Micro-operations
● Replace=mask, insert
● Selective set/forcing to 1: OR (X+1=1, X+0=X)
⮚ To force a location to 1, use 1 bit
⮚ To leave a location unchanged, use 0 bit
● Selective set/forcing to 0: AND (X.1=X, X.0=0)
⮚ To force a location to 0, use 0 bit
⮚ To leave a location unchanged, use 1 bit
● Selective Complement/forcing to change/flipping bits: XOR
X XOR 1= X’ , X XOR 0=X
⮚ To force a location to change, use 1 bit
⮚ To leave a location unchanged, use 0 bit
4-18. Register A holds the 8-bit binary 11011001 . Determine the B operand and the logic
microoperation to be performed in order to change the value in A to:
● 01101101 B=10110100 XOR
● 1 1 1 1 1101 B=11111100, 10010000, 11111101 OR
B=00100100 XOR, OR
Question 1
Replace 4 bits at positions 7,6,5,4 of 16 bit no. 1010111101010110 to 1110.
Output=1010111111100110
Solution
Mask(AND) 1111111100001111
1010111100000110
Insert(OR) 0000000011100000
Question 2
Represent the following with control function:
If P=1 then R1<-R2
Solution P: R1<-R2
Q4.15
4 bit arithmetic circuit
S=0, Cin=0 Add= A+B
S=0, Cin=1 inc =A+0000+1
S=1, Cin=0 dec=A+1111+0= A+2’s complement of 1 +0=A-1+0=A-1
S=1, Cin=1 subtract A+B’+1
