31-07-2024
IC Technology
EEL7500
Dr. Saakshi Dhanekar
D/o Electrical Engg., IIT Jodhpur
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Logistics
• Day and Time – K slot
• Structure – 3-0-0 – Total 3 credits
• Mon 8 am, Wed 8 am, Fri 8 am – 39 lectures (13 weeks)
• Prerequisites- Fundamentals of Electrical Engineering and Basics of
Devices
• Books-
1. James D Plummer, Michael D Deal, Peter B. Griffin, Silicon VLSI
Technology- Fundamentals, Practice And Modelling, Pearson (2009)
2. S.M. Sze, VLSI Technology, Tata McGraw-Hill, 2003
3. Stephen Campbell, The Science and Engineering of Microelectronic
Fabrication 2/e, Oxford University Press, 1996
• Makeup Classes (if needed)
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Objectives
1. Teaching the theory behind unit processes for device and CMOS fabrication
2. To teach the complete VLSI fabrication Technology and challenges ahead
3. Familiarization with cleaning and safety procedures
4. Hands on experience on the unit processes for device fabrication
Learning Outcomes
1. Learning the scientific principles associated with the technologies used in VLSI
fabrication.
2. Understanding of the fabrication methods and unit processes for device and circuit
fabrication.
Student shall be able to design a fabrication process flow for any discrete device as well
as basic
circuits.
3. Ability to fabricate discrete devices and to understand the physical properties of the
films for electronic
device fabrication.
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Course Structure
Total lectures: 39 lectures
Introduction: History of Integrated circuits, CMOS Process flow starting from Substrate selection to
multilevel metal formation, Modern CMOS Technologies (2 lectures)
Wafer Manufacturing: Single crystal growth, Czochralski and FZ growth methods, Wafer
preparation and specifications, Wafer manufacturing (2 lectures)
Cleaning Processes: Clean Rooms, Wafer Cleaning (1 lecture)
Thermal oxidation of silicon: Wet and Dry oxidation, growth kinetics and models, electronic defects,
characterization methods (4 lectures)
Optical lithography: Light sources, Wafer exposure systems, Photo resists, Mask making, Mask
Engineering, Limits and future trends (4 lectures)
Solid state diffusion: Various Models for diffusion, Manufacturing and Characterization methods,
Future trends trends (5 lectures)
Ion implantation: Basic concepts, High/Low energy implants, Limits and future trends, RTA Process
& dopant activation trends (5 lectures)
Thin Film Deposition: Physical and chemical vapor deposition techniques trends
(6 lectures)
Etching: Wet and dry etching, Reactive and plasma etching (6 lectures)
Back-end Technology: Backend Technology and VLSI/ULSI process integration, Multi-level
Interconnects, Silicide formation, planarization, packaging. (2 lectures)
Novel Processes: Fabrication processes for MEMS , large area and flexible electronics systems,
challenges and future trends (2 lectures)
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Break up of the total score
Total Score = 100%
Continuous Evaluation = 30%
2 quizzes –10% * 2 = 20%
Presentation and Mini Project – 10%
Minor exam – 30%
Major Exam components = 40 %
Minor Date – 21st September; 3-5 pm
Major Date – 25th Nov; 9 am – 12 noon
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Attendance Policy @IITJ
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History of ICs
Intel’s first product - SRAM
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Moore’s Law
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From Intel- Going forward
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TSMC – Going Forward
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Top and Cross sectional drawings
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Diode schematic
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Diode schematic
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BJT schematic
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MOS schematic
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MOS schematic
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Transistors on Si wafer
10.16920/jeet/2018/v32i2/139493
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What you should know by now?
Why use Silicon?
Advantages of Silicon dioxide.
How a diode functions?
How BJT and MOSFET functions?
How they look at the chip level?
What is the meaning of die size?
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[Link]
[Link]
[Link]
[Link]
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What is an IC?
An Integrated Circuit (IC) is a miniaturized low
cost electronic circuit consisting of active and
passive components fabricated together on a
substrate (Silicon).
Active transistors, diodes
Passive capacitors, resistors
These components are interconnected with an
external connecting terminals contained in a
small package
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12-08-2024
Classification of ICs
SSI: Small scale integration. 3 – 30 gates per chip.
MSI: Medium scale integration. 30 – 300 gates per chip.
LSI: Large scale integration. 300 – 3,000 gates per chip.
VLSI: Very large scale integration. More than 3,000 gates
per chip.
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Why use ICs?
1. Miniaturization and hence component density
2. Batch processing and cost reduction
3. Improved system reliability Wire bonding
4. Better functional performance
5. Increased speeds
6. Significant reduction in power consumption
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Packages - IC
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Types of ICs?
Thin and thick film ICs
Monolithic ICs
Hybrid or multichip ICs
Digital ICs
Analog Ics
Mixed signal ICs
[Link]
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What is a Crystal?
Crystals have an extremely well-organized molecular
structure. In a crystal, all of the atoms (or ions) are arranged
in a regular grid pattern
Crystal orientation refers to the set of all physically distinct
orientations of the local crystal which can occur in nature
The smallest repeating unit of the crystal lattice is the unit
cell, the building block of a crystal.
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Different Unit Cells
In each cubic unit cell, there are 8 atoms at the
corners. Therefore, the total number of atoms in one
unit cell is
8 × 1/8 = 1 atom.
8 corners × 1/8 per corner atom = 8 × 1/8 = 1 atom
1 body centre atom = 1 × 1 = 1 atom
Therefore, the total number of atoms present per unit cell = 2
atoms.
8 corners × 1/8 per corner atom = 8 × 1/8 = 1 atom
6 face-centred atoms × 1/2 atom per unit cell = 3 atoms
Therefore, the total number of atoms in a unit cell = 4
atoms.
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When referring to a specific plane, "round" brackets are used: (hkl)
When referring to a set of planes related by symmetry, then "curly" brackets are used:
{hkl}
Directions in the crystal can be written as [UVW]
A number of crystallographic directions can also be symmetrically equivalent, in which case a
set of directions are written with "triangular" brackets: <UVW>
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3 coordinates – x,y and z
a- Lattice constant – Basic distance over which the unit cell repeats in the cubic
crystal
To go from A B, we move one unit in each, x,y and z. Thus, (111)
To go from A C, we move (010)
Crystal directions
– [hkl]
Crystal planes –
(hkl)
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Miller Indices
Miller indices are the mathematical representation of the crystal planes.
The concept of miller indices was introduced in the early 1839s by the British
mineralogist and physicist William Hallowes Miller.
Miller introduces a set of three numbers to designate a plane in a crystal. This
set of three numbers in known as miller indices of the concerned plane.
(h,k,l)
In the cubic system the (hkl) plane and the
vector [hkl], defined in the normal fashion
with respect to the origin, are normal to one
another but this characteristic is unique to the
cubic crystal system and does not apply to
crystal systems of lower symmetry.
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Symmetry Equivalent Surfaces
There are a total of 6 faces related by the
symmetry elements and equivalent to the
(100) surface - any surface belonging to this set
of symmetry related surfaces may be denoted
by the more general notation {100} where the
Miller indices of one of the surfaces is instead
enclosed in curly-brackets.
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Silicon Unit Cell
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