THE COMPUTATION OF % REDUCTION OF LINE LOSSES DUE
TO COMPENSATION OF VAr LOADING
Let us assume an Apparent Load being fed by a 11 KV System is :
𝑨𝟏 = 𝑽 × 𝑰𝟏 = 𝟏𝟎 𝑴𝑽𝑨
Let us assume that the Power Factor of the loaded system is 𝒑𝒇𝟏 = 𝟎. 𝟖𝟓(𝒍𝒂𝒈)
Therefore, the Active load requirement of the system is :
𝑷 = 𝒑𝒇𝟏 × 𝑨𝟏 = 𝟏𝟎 × 𝟎. 𝟖𝟓 = 𝟖. 𝟓 𝑴𝑾
Now, let us assume that the Power Factor has been improved by installing proper rated
capacitor bank to : 𝒑𝒇𝟐 = 𝟎. 𝟗𝟓 (𝒍𝒂𝒈)
The Active load of the system is fixed at 𝑷 = 𝟖. 𝟓 𝑴𝑾
Therefore, the Apparent load requirement of the system is
𝑷 𝟖.𝟓
𝑨𝟐 = = = 𝟖. 𝟗𝟓 𝑴𝑽𝑨
𝒑𝒇𝟐 𝟎.𝟗𝟓
∴ 𝑪𝒂𝒑𝒂𝒄𝒊𝒕𝒚 𝑹𝒆𝒍𝒆𝒂𝒔𝒆 = (𝟏𝟎 − 𝟖. 𝟗𝟓)𝑴𝑽𝑨 = 𝟏. 𝟎𝟓 𝑴𝑽𝑨
Let, the Current before installation of the Capacitor Bank is 𝑰𝒓𝟏 and that after installation
of Capacitor Bank is 𝑰𝒓𝟐
The % decrease in Line Loss (Considering 𝑅 Resistance ) :
𝑰𝟐𝒓𝟏 × 𝑹 − 𝑰𝟐𝒓𝟐 × 𝑹
∆𝑳 =
𝑰𝟐𝒓𝟏 × 𝑹
𝑰𝟐𝒓𝟏 − 𝑰𝟐𝒓𝟐
=
𝑰𝟐𝒓𝟏
(𝑽𝑰𝒓𝟏 )𝟐 –(𝑽𝑰𝒓𝟐 )𝟐
= (𝑽𝑰𝒓𝟏 )𝟐
[Multiplying both numerator & denominator with 𝑽𝟐 ]
𝑨𝟐𝟏 −𝑨𝟐𝟐
=
𝑨𝟐𝟏
𝑨 𝟐
= 𝟏 − ( 𝟐)
𝑨𝟏
𝟖.𝟗𝟓 𝟐
= 𝟏 − (. )
𝟏𝟎
= 𝟎. 𝟏𝟗𝟖𝟗 = 𝟏𝟗. 𝟖𝟗%
SOUMYADEEP RAY
BEE CERTIFIED ENERGY AUDITOR
M.TECH (GOLD MEDALIST), POWER ELECTRONICS & ELECTRICAL DRIVES, IIT (ISM)-
DHANBAD
Actual reduction of loss is more as voltage will increase in turn reducing the current to
further extent. Actual result can be obtained by Load Flow Analysis.
IC
-Ir1R
δ1
δ2
VS
Ø2 -jIr2X
Ø1
Ir2 Vr2
Vr1 -jIr1X
Ir1
Ir1= Receiving End Current (Uncompensated)
Ir2= Receiving End Current (Compensated)
Ø1= power Factor Angle (Uncompensated)
Ø2= power Factor Angle (Compensated)
Vr1= Receiving End Bus Voltage (Uncompensated)
Vr2= Receiving End Bus Voltage (Compensated)
δ1 = Angle between Sending and Receiving End Bus Voltage (Uncompensated)
δ2 = Angle between Sending and Receiving End Bus Voltage (Compensated)
VS= Sending End Voltage
R= Resistance of Transmission Line
X= Reactance of Transmission Line
IC= Capacitor Current
Phasor Diagram Showing Reduction of Load Current Due to
Installation of Capacitor Bank
SOUMYADEEP RAY
BEE CERTIFIED ENERGY AUDITOR
M.TECH (GOLD MEDALIST), POWER ELECTRONICS &
ELECTRICAL DRIVES, IIT (ISM)-DHANBAD
