United
Course: International
CSE 1326 University
Course Title: Digital logic
QUEST FOR Design Laboratory
EXCELLENCE
Experiment No: 1
Experiment Name: Implementing Multiplexers
Submitted by ASIF RAHMAN
ID: 0112310389
Team No: 5
Group Name: Phoenix
Date of Performance: 17/10/23
Date of Submission: 4/11/23
Experiment 1:
Implementation of multiplexers
Objectives:
1. Implementing the function F(A,B,C)= ∑m (0,2, 5, 7) using 4:1 MUX
2. Implementing the function F(A,B,C)= ∑m (0,2, 5, 7) using 2:1 MUX
3. Making a 32:1 MUX from 2:1 MUX
Components Used:
1. Logisim software
2. Trainer board
3. Wiring
4. 74151 8 input multiplexer
5. 74153 dual 4 input multiplexer
6. 74157 quad 2 input multiplexer
Theory:
Multiplexing is the generic term used to describe the operation of sending one or more
analogue or digital signals over a common transmission line at different times or speeds and as
such, the device we use to do just that is called the multiplexer. The pinout diagram of 74151 8
input multiplexer & 74153 dual 4 input multiplexer is shown below.
Figure 1: 74151 8 input multiplexer
Figure 2: 74153 dual 4 input multiplexer
Problem solving procedure:
To Implement the function F(A,B,C)= ∑m (0,2, 5, 7) using 4:1 MUX we need to make a truth
table of the function and implementing table of the function. We will use B & C as select pins
and A as data line.
m A B C F
0 0 0 0 1
1 0 0 1 0
2 0 1 0 1
3 0 1 1 0
4 1 0 0 0
5 1 0 1 1
6 1 1 0 0
7 1 1 1 1
Now we will make an implementation table and green light the desired minterms and finally
figure out the input of data lines.
D0 D1 D2 D3
A’ 0 1 2 3
A 4 5 6 7
A’ A A’ A
We can now implement the function using above data.
Figure 3: Implementation of the function using 4:1 MUX
Now we will Implement the function F(A,B,C)= ∑m (0,2, 5, 7) using 2:1 MUX. We will do it in the
same process above. We will use A & B as data line and C as select bit. The truth table and
implementation table are shown below.
m A B C F
0 0 0 0 1
1 0 0 1 0
2 0 1 0 1
3 0 1 1 0
4 1 0 0 0
5 1 0 1 1
6 1 1 0 0
7 1 1 1 1
D0 D1
A’B’ 0 1
A’B 2 3
AB’ 4 5
AB 6 7
Here, D0= A’B’+A’B = A’(B’+B)=A’.1=A’
And D1= AB’+AB=A(B’+B)=A.1=A
Now we can implement the function using above data.
Figure 4: Implementation of the function using 2:1 MUX
Now we will make a 32:1 MUX using 2:1 MUX. To do this, we will first have to make a 4:1 MUX
using 3 2:1 MUX. Then we’ll use 2 4:1 MUX and 1 2:1 MUX to make a 8:1 MUX. Similarly, we’ll
make 8:1, 16:1 and finally 32:1 MUX. The circuit diagram is shown below.
Figure 5: 4:1 MUX using 2:1 MUX
Figure 6: 8:1 MUX using 4:1 MUX
Figure 7: 16:1 MUX using 8:1 MUX
Figure 8: 32:1 MUX using 16:1 MUX
Thus we can create a 32:1 MUX from 2:1 MUX.
Conclusion:
I learned how a mux works and how to implement a mux to get the desired output of a given
function. Furthermore, I also learned how to go from a lower order MUX to a higher order
MUX.
