Received 20 September 2022, accepted 13 October 2022, date of publication 19 October 2022, date of current version 25 October 2022.

Digital Object Identifier 10.1109/ACCESS.2022.3215800

Hardware-Accelerated Real-Time Spectrum

Analyzer With a Broadband Fast Sweep Feature
Based on the Cost-Effective SDR Platform
PRZEMYSŁAW FLAK
Department of Automatic Control and Robotics, Faculty of Automatic Control, Electronics and Computer Science, Ph.D. School, Silesian University of
Technology, 44-100 Gliwice, Poland
e-mail: [email protected]
This work was supported by the Ministry of Education and Science of Poland under Grant DWD/4/21/2020-00375/003.

ABSTRACT Radio Frequency (RF) spectrum monitoring and broadband signal analysis have multiple
application areas, especially in the era of a constantly growing number of wireless devices. One of the
essential challenges for a spectrum sensor is to achieve an adequate measurement rate over a wide bandwidth
to detect signals of short duration so that a low latency response can be provided. In procedures that
require field measurements, and some compromise in accuracy is acceptable, low-cost Software Defined
Radio (SDR) devices can be used instead of expensive and bulky professional spectrum analyzers. This
paper introduces a real-time swept spectrum sensor based on LimeSDR-USB with custom embedded Field
Programmable Gate Array (FPGA) firmware, designed to outperform similar software implementations.
The Welch’s spectral density estimation is implemented in hardware to minimise the USB transfer rate
and offload the host PC signal processing. Furthermore, the frequency tuning state machine and cache
calibration memory are also managed by the FPGA to reduce the blind time during broadband sweep. The
performance of the proposed solution indicates up to 96 MHz of real-time bandwidth along with a capability
of less than millisecond cumulative sweep time per gigahertz. The characteristics of various design elements
are investigated and refined during simulation and laboratory measurements, whereas the final prototype
implementation is verified in real-world scenarios. The results demonstrate the effectiveness of the proposed
device as a sensor for propagation studies, multiband spectrum utilisation monitoring, and spectral white
spaces detection.

INDEX TERMS Electromagnetic analysis, field programmable gate array, radio frequency, software defined
radio, surveillance.

I. INTRODUCTION that spectrum allocation efficiency is extremely low, there

The Radio Frequency (RF) spectrum is a finite and limited is a requirement to exploit more sophisticated management
natural resource that is used for a broad range of essential methods to address the underutilisation issue.
activities in both the military and civil domains. This tech- On the other hand, monitoring RF spectrum activity is an
nology is used for mobile communications, radio astronomy, important tool to ensure the security of industrial facilities,
and broad surveillance. Spectrum scarcity and congestion airports, and other objects of strategic importance. Long-term
are persistent problems for the wireless industry, especially broadband analysis can reveal information about spectrum
in the age of an ever-increasing demand for wireless data violations by recognising transient aberrant usage patterns
transfer [1]. Whereas numerous studies [2], [3], [4] report that might go undetected in coarse occupancy scans [5].
In this area, a novel threat has emerged in the last few years,
The associate editor coordinating the review of this manuscript and caused by the unauthorised use of commercially available
approving it for publication was Ilaria De Munari . drones with wireless connectivity. The problem is so critical

This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/
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that the rapid evolution of drone countermeasure technologies

based on RF analysis has recently been observed [6].
An urban environment with a high concentration of devices
connected to wireless networks poses a serious challenge for a
standalone central sensing element [7]. In this scenario, build-
ing the electromagnetic situation awareness with a distributed
FIGURE 1. Block diagram of the classic SDR architecture, with individual
spectrum monitoring system can provide the best area cover- on-board chips colour scheme. In this framework, raw IQ baseband signal
age [8]. The infrastructure could potentially be composed of representation is transferred to the host PC and further processed in the
software to obtain a spectral estimator.
an endless number of sensing nodes with a fusion data centre
capable of processing both fragmentary and unambiguous
input data [9]. For such a concept to be feasible, the price interface translation, low-level host-controlled configuration,
of the individual node must be minimised. Therefore, the and data buffering.
focus of this study is to develop a low-cost sensor based Modern mid-range SDR platforms, such as the Universal
on off-the-shelf Software Defined Radio (SDR), that can be Software Radio Peripheral - USRP B210 [15], HackRF [16],
used in place of expensive and bulky professional spectrum and LimeSDR [17], include an RF front-end with sufficient
analyzers in procedures where some accuracy trade-off is tuning range and ADC parameters to implement a spectrum
acceptable. analyzer [18]. All of these devices has a USB 3.0 interface
The current research extends the functionality of a device to transfer baseband time-domain samples to the host PC and
described by the author in a prior study for drone detection suffer from its limitations [10], [19]. As a result, despite the
to other general-purpose applications including broadband greater capabilities of the analogue front-end, the instanta-
monitoring [10]. The main focus is on migrating baseband neous bandwidth of LimeSDR is limited to 61.44 MHz.
processing tasks to the Field Programmable Gate Array On the other hand, high-performance SDR devices that
(FPGA), as suggested in [11], in order to improve perfor- offer more than 120 MHz of instantaneous bandwidth and a
mance compared to the common SDR solutions. Addition- 10 GigE interface cannot be considered cost-effective, which
ally, the Welch’s spectral density estimation and wideband is one of the main objectives of this work [20]. Additionally,
scan controller are implemented in hardware to reduce the the broadband scan is not a default function to be performed
USB transfer rate and offload the host PC for further signal by any of the listed devices, and thus its efficient implemen-
processing in software. tation requires additional effort.
The structure of this paper is organised as follows: the There are two basic modes of operation for wideband
SDR fundamentals, including the problem statement, are spectrum sensing instruments: sweep mode and Fast Fourier
introduced in Section 2, and the related work is discussed in Transform (FFT) mode [21]. The classic spectrum sensing
Section 3. The spectrum sensor with implementation details approach is the swept mode, in which the centre frequency is
is presented in Section 4. Finally, an experimental setup with rapidly incremented by a small step. A Resolution Bandwidth
test results is provided in Section 5, whereas conclusions and Filter (RBW) is applied to the signal obtained at each step,
ideas for future development are outlined in Section 6. and the amplitude is estimated by a detector. The sweep time
is the amount of time it takes for the front-end to scan the
II. SDR FUNDAMENTALS desired frequency range. The spectrum can only be measured
The SDR paradigm and its architectural principles without at one frequency point at a time using a swept analyzer, which
implementation details were defined in 1991 by Mitola [12]. is a severe drawback. FFT-based spectrum analyzers do not
In this concept, the physical components include only an require RF front-end sweeping. Alternatively, FFT is used
antenna with an Analog Digital Converter (ADC) on the to transform from the time-domain to the frequency-domain.
receiver side and a Digital Analog Converter (DAC) on the The sampling frequency, and hence the instantaneous band-
transmitter path. The remaining functions are handled by width, define the frequency range of the FFT-based analyzer.
reprogrammable processors. Thanks to technological devel- The sweep time describes the period between two successive
opments, this idea has evolved over time, and the solution has FFT outputs in this operating mechanism. Furthermore, both
now been commercialised. An interesting review on SDR in operating modes can be combined. The end product is then a
function of spectrum sensor can be found in [13]. composite of multiple FFT images captured at various centre
A contemporary, inexpensive SDR hardware architecture frequencies. This mode is referred to as swept FFT, and it is
is presented in Fig. 1. For clarity, further considerations are the focus of this paper.
limited to the receiver (RX) path. The RF front-end integrates For an SDR device to function as a broadband spectrum
analogue and digital signal chain elements like mixers, fil- analyzer, it must be tuned repeatedly during the sweep. With
ters, frequency synthesizers, and ADCs. The time-domain the samples collected while being at each centre frequency,
representation of the baseband signal, in the form of In-phase an FFT is performed, and a part of a spectral estimate that
and Quadrature components (IQ) [14], is passed through equals the available instantaneous bandwidth is obtained.
the FPGA and sent to the host PC via a USB controller. Typically, successive scans are overlapped by 10% to
The hardware contribution to this process is limited to eliminate filter roll-off at both edges of the observed band.

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B. SDR-BASED SOLUTIONS
The authors in [23] provided an in-depth comparative anal-
ysis of SDR devices with laboratory spectrum analyzers.
Moreover, a detailed theoretical background for wideband
sensing is presented. The main objective of this work is
FIGURE 2. An introduction to the concept of frequency sweeping. The
to implement the sensing engine software that relies on
stages of data collection for FFT calculation are interspersed with blind multi-threading FFT to achieve parallel processing. The tar-
times. get 100 MHz scan, made with overlapping portions of the
25 MHz band, is accomplished in one second. However,
whereas it is not possible to achieve better parameters than
The interval between consecutive sampling phases is known with the laboratory analyzer, the performance is improved
as blind time. This principle is presented in Fig. 2. The compared to similar SDR sensor solutions. In conclusion,
rapid retuning procedure of the RF front-end raises several it is found that the proposed pipeline architecture can be
implementation concerns, and all of them have an impact on transferred to FPGA in the future to reduce the computational
the final sweeping speed. The first issue is the time needed to power required by the embedded system.
send the configuration command from the host PC via USB The multi-band spectrum sensing technique proposed
to the FPGA, and next, using the onboard Serial Peripheral in [24] is based on the idea of linking several affordable SDRs
Interface (SPI) to the RF front-end chip. The second factor to operate in parallel on different frequency segments. In the
is frequency synthesizer lock time, which varies depending paper, a sensor for spectrum occupancy detection is proposed,
on the device, requested settings, and the distance of the enhanced by advanced software-implemented signal process-
consecutive frequency jump. Finally, because automatic cor- ing techniques. The results in terms of detection probability
rector blocks require additional time to settle immediately and band occupancy measurements are promising. Unfortu-
after tuning, the initial batch of streamed IQ samples con- nately, the update period is indeed 100 ms.
taining significant DC errors is often discarded. Each of these Another pure software solution based on USRP and
characteristics is addressed separately in the current work to open-source GNU Radio is found in [25]. The problem with
resolve these vulnerabilities. dynamic tuning of a centre frequency during wideband sweep
is observed by the authors and adjusted by using a custom
III. RELATED WORK Python code block. Because the design is highly reconfig-
This section highlights some of the recent spectrum sensing urable, the achieved parameters are not mentioned explicitly.
systems, including both commercially available portable ana- A similar approach in [19] additionally highlights the pres-
lyzers and those identified during the literature review. High- ence of a significant DC offset contribution in the first batch
end spectrum analyzers intended for laboratory application of USRP data following frequency retuning. For a 100 MHz
are excluded from this discussion since they are exceedingly bandwidth, the attainable sweep rate is 0.875 per second.
expensive and are not designed to be battery operated in field Resolving the problem of latency in the frequency tuning
measurements. Alternatively, related solutions based on SDR process via a host PC USB command is proposed in [26].
are thoroughly discussed for parameter comparison with the Minimising blind time by incorporating sweep control into
proposed approach. The emphasis is on the instantaneous HackRF FPGA firmware yields a substantial 8 GHz per sec-
bandwidth parameter and the wideband sweep functionality ond scan rate. Furthermore, the findings mention the possibil-
implementation details. ity of additional improvement, although no major advance-
ments are expected. As a consequence, for simplicity, the
A. PORTABLE SPECTRUM ANALYZER authors decided to include a fixed delay of 820 µs after each
Tektronix’s entry-level RSA503A [22] is a small, lightweight, retuning to let the analogue front-end settle. Aside from that,
battery-powered instrument that covers a 9 kHz to 3 GHz even though the FFT is hardware implemented in FPGA, the
spectrum range. It features a 40 MHz real-time bandwidth time-domain form is reconstructed after spectrum stitching
and a full-span sweep capability of 70 GHz per second. to preserve compatibility with current software visualisers,
It connects to a PC tablet to form a comprehensive spectrum which is the method’s fundamental limitation.
analyzer with sophisticated measurement features aided by Apart from hardware enhancements, spectrum observation
host programs. By eliminating the embedded display, it is efficiency may also be improved alternatively by sweeping in
possible to overcome the limitations of previous portable an intelligent manner. The inherent contradiction between the
designs in which the signal processing path was tailored to necessity to scan a wide spectrum fast and to obtain detailed
the capabilities of the screen [23]. Extended recording times sub-band information is discussed in [5]. Essential elements
for long-term analysis are thus possible with this method. include a learned database of signal patterns as well as a novel
However, a new problem with the USB 3.0 transfer limit scheduling algorithm that leverages these patterns to deter-
has emerged. Even though this is only a basic version of the mine when to sample each band to increase the possibility of
device, the SDR chosen for the current design is ten times less detection. Implementing this in real-time is challenging since
expensive. it requires processing over a Gbit per second data stream.
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All key operations are implemented using Intel’s streaming

extension, offering instruction-level parallelization and an
appropriate software library to accommodate such high data
rates.
According to [27], the minor hardware modification of
the USRP delivers an impressive scan result of 5 GHz
in 5 ms. High temporal resolution is achieved by supplying
a chirp signal to the mechanism that sets a front-end to a
specific frequency and sweeps over the spectrum. Although
this approach causes signal distortion, it is corrected using
self-generated calibration data afterwards. Interesting results
are provided in the experiments with the classification of
some standard protocols in the 2.4 GHz band at various scan
speeds. Due to the limited number of samples that lead to FIGURE 3. Comparison of the FPGA’s contribution to signal processing in
larger distortions, significant accuracy loss is observed at the the original and extended firmware versions. The proposed sensor
fastest sweep rate of 100 MHz per 125 µs. architecture based on classic SDR includes signal processing chain for
Welch’s spectral estimator and sweep controller implemented in the
FPGA fabric to minimise the USB transfer rate and analyzer blind time.
IV. PROPOSED METHOD
LimeSDR is chosen as the foundation for building the
SDR-based spectrum analyzer. A broadband sweep is rep- USB transfer rate. This is a considerable amount of data for
resented by a collection of consecutive spectrum snapshots the portable computer to post-process in real-time. In addi-
obtained at various centre frequencies. Since the 96 MHz tion, performing the frequency-domain transform is only the
instantaneous bandwidth capability of the RF front-end first step of a more complex signal analysis. As a solution,
exceeds other mid-range SDRs, choosing this platform is Welch’s periodogram algorithm is implemented in hardware
critical in developing a sensor for a faster swept FFT to estimate Power Spectral Destiny (PSD) [28]. The advan-
mode. To fully exploit this advantage, significant changes tage of using a periodogram rather than performing FFT
to the manufacturer’s firmware are required. The proposed directly is the ability to control the trade-off between time
approach and the degree of hardware modifications increas- and frequency resolution.
ing FPGA’s contribution to the process are demonstrated To provide a theoretical basis for Welch’s method, suppose
in Fig. 3. the received signal is represented as follows:
Considering only the receiving part, in the original
firmware, the FPGA is responsible for buffering and inter- x(n) = s(n) + z(n), 0 ≤ n ≤ N − 1, (1)
face translation between the analogue front-end and the USB where s(n) is signal of interest, z(n) stands for noise, n denote
driver. There is no signal processing inside the FPGA, and sample number, and N is the total number of samples. Next,
the raw IQ samples are sent forward. An integrated NIOS divide the signal x(n) into K segments of length M with an
soft-core processor receives control data to configure the overlap of D, and write the signal in the segment k as:
front-end according to host PC commands. The latency in
this process allows the front-end to be tuned only a few times xk = x(m + kD), m = 0, . . . , M − 1, k = 0, . . . , K − 1.
per second. In this case, the bandwidth of the off-the-shelf (2)
device is limited to 61.44 MHz due to a USB 3.0 transfer rate
constraint. The Fourier transform Xk (ω) of a data segment, with the
In the extended implementation, the available transfer rate window function w(m) applied, is given as:
is sufficient to achieve the full instantaneous bandwidth pro- M −1
X
vided by the analogue front-end. Through the utilisation Xk (ω) = w(m)xk (m)e−jmω . (3)
of the time-frequency transform and decibel-scale PSD for- m=0
matting inside FPGA, the USB load is already reduced by
half. To avoid the problem of control latency, the original Then, the periodogram of the segment k is defined as:
host-controlled tuning scheme is therefore replaced by a state 1
Ik (ω) = |Xk (ω)|2 , (4)
machine and cache inside the FPGA. The additional tech- MU
niques introduced for the purpose of this paper to accelerate where U identifies the power of the window, expressed as:
the sweep and calibration processes will be discussed in
M −1
greater detail in the following subsections. 1 X 2
U= w (m). (5)
M
A. SPECTRAL ESTIMATE m=0

Acquiring the entire available instantaneous bandwidth in the A final estimate of the PSD is produced using the Welch’s
form of a 12-bit time-domain IQ stream requires a 288 MB/s method by averaging the periodograms of all the segments,

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The original firmware provided by the vendor requires over

74% of FPGA combinational logic resources and 72% of
integrated memory blocks. Fitting the modules necessary for
this study into this form is not achievable. Therefore, the first
step is to identify and eliminate all of the design compo-
nents responsible for the transmit path that are irrelevant in
the spectrum analyzer application. Furthermore, because the
original architecture includes an NIOS soft-core processor,
it can also be optimised in terms of internal memory util-
isation. Some C/C++ code changes enables the release of
these resources due to the decreased number of executable
programme lines needed for receiving only applications. For
now, this action should be carefully maintained in order
to retain compatibility with host-PC configuration software.
In the future, NIOS will be removed in order to further
enhance the signal processing chain for a specific sensor
application.
FIGURE 4. Illustration of Welch’s method while segmenting 5120 samp- It is sometimes possible to reuse calculation modules and
les. Dual independent FFT modules implemented together with the signal
processing chain in an FPGA for parallel processing. Color-coded
conserve resources when developing with high-speed FPGAs
segments of time-domain data are processed by the corresponding by increasing the clock speed in comparison to the front-end
FFT module. ADC, while still maintaining the necessary pipeline latency.
This method cannot be used when 96 MHz sampling is
desired since the maximum clock speed estimated for the
as follows:
device with FFT is around 120 MHz. Another choice is
K −1
1 X to buffer the samples and postprocess the data during the
PWelch (ω) = Ik (ω). (6) subsequent retuning process. However, because the com-
K
k=0 plete transform computation of four data segments takes
In accordance with the preceding, a fixed number of longer than the standard blind time, any additional delay
IQ samples at a specific centre frequency, denoted by N , may have an adverse effect on overall performance. As a
are collected. The N samples are then divided into M seg- consequence, in exchange for increased resource utilisation,
ments. Each data block overlaps the adjacent one by 50%. it was decided to employ a solution based on two parallel FFT
An FFT is performed on each windowed chunk, and the result modules.
is averaged to produce a final PSD. The process of segmen- The signal processing path implemented in FPGA is
tation and overlap is illustrated in Fig. 4a. The procedure is presented in Fig. 4b. The pipeline and parallel processing
repeated on every new centre frequency. paradigm are used to achieve real-time performance. The
The hardware-specific characteristics should be considered FFT2 module begins the computation by skipping the first
while selecting the most appropriate N and M values. The M /2 samples in order to process the data from the second
LimeSDR RF front-end includes an automatic DC offset segment. FFT1 can begin analysing the first segment right
corrector block with a minimum observation window length away, but in this case the output will be M /2 ahead of FFT2.
of 4096 samples. This indicates that after a defined sam- This result can be further delayed to compensate, but when
ple count, the new adjusted signal appears. It is explored considering practical issues of implementation, it is more
in greater detail later, but for now, the value is considered convenient to delay the input. In this approach, both FFTs
the bare minimum to be acquired after tuning. The sizes simultaneously generate a result that can be directly summed
of 2048 for M and 5120 for N are chosen respectively to in an averaging module. Since the input bit width is set at the
maintain a balance between time and frequency resolution. IQ 12-bit resolution of the RF front-end, the memory size may
This yields an average factor of four in the final PSD calcu- be determined in advance. Furthermore, the memory capacity
lation stage. Consequently, each 96 MHz spectrum fragment is smaller because the subsequent modules involving DC
takes roughly 53 µs to analyse, with a resolution of 46 kHz. removal, twiddle multiplication, and butterfly calculations
The open-source code from the LimeSDR-USB vendor provide significant bit growth.
created with Quartus II software is used as a starting point for Implementation details of other blocks related to the signal
the FPGA structure modification [29]. Since FFT overlap was processing chain are provided in the source publication [10].
not a goal of the author’s previous study, pipelined processing The final PSD is transferred to the host PC in a 12-bit
with a single FFT module has been implemented before. formatted dB scale, which results in a USB throughput of
As the current study applies the overlapping methodology around 58 MB/s. This amount is eventually lowered due
required to carry out Welch’s method, additional effort is to blind time inclusion and finally remains even under the
needed to fit the signal processing chain within an FPGA. USB 2.0 limit.

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B. FREQUENCY TUNING CONTROL

Migrating the frequency tuning mechanism to the FPGA
firmware is the essential factor for sweep speed accelera-
tion. It is difficult to determine the exact delay of the single
command realisation via software as it is composed of many
factors. However, it could be predicted based on the wide FIGURE 5. Comparison of a single 32-bit transaction via the generic SPI
bandwidth sweep in comparable systems. Nevertheless, the interface with the entire set of fourteen 32-bit transactions required for
SPI configuration time itself can be precisely defined. The the retune procedure applying the proposed method. Both analyses are
displayed on a common time scale.
quickest way to perform frequency retuning during a sweep
is to restore the previously determined tune register content.
A set of six 16-bit registers is generally used for centre fre- The only programmable parameter in the front-end cali-
quency management. An original method employs the NIOS bration loop is the averaging window length, and there is
soft-core processor inside the FPGA, which is responsible no mechanism to synchronise the observation space with the
for receiving commands from the host PC and a generic SPI centre frequency tune process. However, the exact values
module to configure the RF front-end. elaborated by the corrector can be read and written. This
The SignalTap II Logic Analyzer is a tool for real-time and is a time-consuming operation for the host PC controlled
high-speed design debugging incorporated into the Quartus II approach. Because the access is edge-triggered in relation to
software. The exploitation of the FPGA’s integrated memory a specific bit in the SPI frame, the modification procedure
allows the observation of signals inside the structure. It is used implies a sequence of transactions. Moreover, there are dis-
in the initial design phase for system vulnerability identifi- tinct registers for I and Q components.
cation and accurate timing measurements. Figure 5 shows a The reaction of the RF front-end to a rapid switchover to a
comparison of the generic and optimised SPI transaction pro- new frequency is presented in Fig. 6. Due to the asynchronous
cesses captured in hardware. It can be observed that the time nature of the calibration window, the corrector’s response
of a single SPI transaction using the original project is compa- is completed in two steps to properly compensate for the
rable to the complete sequence of fully hardware-controlled DC offset. In this case, a number of samples taken prior
transfers after modification. or even during the retuning process influence the corrector
In the original firmware, the single 32-bit SPI transaction outcome. As a result, in other designs, sweeping speed per-
required to set one configuration register is separated into formance decreases because a large number of samples are
four 8-bit chunks over time. The generic SPI peripheral, dropped while waiting for the automatic corrector.
which is part of the NIOS CPU, is configured in this manner During initial experiments, the short-term repeatability
by default. Moreover, due to USB and host PC command of DC corrector values related to a specific frequency was
latency, the time interval between consecutive 32-bit SPI observed. The current idea is to let the corrector run in
writes is more than tens of microseconds. The redesigned SPI the background and read the calculated registers after each
module can conduct all the fourteen read/write transactions data collection stage. The values are saved in FPGA cache
in burst mode, required for a complete retune cycle. As a memory and restored while returning to the same centre
result of this improvement, the setup procedure is signifi- frequency in a subsequent sweep. This solution enables a
cantly faster, which influences the reduction of blind time. considerably smaller number of initial samples to be dropped.
Furthermore, a mechanism for dynamically determining the This idea will be ineffective without SPI acceleration and
frequency synthesiser lock moment is now available. After the FPGA firmware adjustment because the original interface
setup, an RF front-end register that indicates lock is contin- latency is longer than the corrector response time. Further-
ually read instead of having a fixed delay like in previous more, since the corrector and the IQ samples source have
studies. Because the lock delay varies in different operating independent access interfaces, this activity can be carried out
scenarios, this is the most versatile solution. As an outcome, in the background. Because of the USB that aggregates these
the worst-case delay does not need to be predetermined. two interfaces, true parallel reading is not possible when the
host PC is performing the same task. Therefore, this approach
C. ERROR CORRECTION AND CALIBRATION has never been introduced before.
There are three sources of the DC error at the RX output [17]. In addition to analogue correction, each signal path has
The most significant is the second-order distortion compo- a mathematical DC component equaliser calculated over the
nent, which varies with the RX input level at the current cen- exact FFT observation window. The combination of analogue
tre frequency. A real-time compensation loop inside the RF and digital correction leads to a significant reduction in the
front-end is employed to track and cancel any variations in the DC component visibility in future analysis.
RX DC caused by signal level changes or temperature effects. The phase offset and gain mismatch between the I and
This is an analogue correction that depends on controlling the Q components, unlike the preceding, cannot be tracked
current injected to bias the input RF amplifier. This process and automatically eliminated in the background. Tuning
is also important to ensure the full dynamic range operation these parameters is an iterative process requiring an internal
of the input ADC and prevent saturation. signal as a reference. Moreover, the procedure is poorly

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FIGURE 7. Cache memory structure inside the FPGA fabric. A single

centre frequency configuration block with calibration values that consists
of ten 16-bit registers is shown in detail. Internal register addresses are
given according to RF front-end documentation. A collection of that
blocks creates a hopping table.

The first six registers that define the centre frequency

are filled in by the user. The Lime API package includes
a function that assists in generating their content. Since the
FIGURE 6. Comparison of a signal response to a rapid centre frequency phase corrector only requires 12 out of 16 available bits, the
change. The automatic corrector latency provides considerable DC offset
and limitation of the ADC dynamic range after retuning in the original rest of the seventh register is intended for additional configu-
firmware. This is significantly reduced in the proposed approach. ration. The remaining bits identify the number of consecutive
Welch’s periodograms to be obtained at the current centre
frequency. This method enables more intelligent sweeping
documented. When building a demodulator for an advanced like that presented in [5], or a fast full band scan when the
modulation scheme, calibration of these values is critical. value is set to zero. Furthermore, this approach supports
It should not be neglected for spectrum analysis, but it is selective band sweep, so scan patterns do not have to be
less significant than the real-time calibration of the DC offset. continuous. This is impossible in HackRF modification [26]
This is the reason for establishing the calibration stage once which only specifies the start and stop frequencies.
in the first step of the sweeping procedure. When an operation The DC equaliser requires only 14 bits, so the remaining
is completed during a preliminary sweep, the calibration data 2 bits are used to determine whether the state machine should
is stored in the FPGA cache memory section associated with return to the beginning of the cache and restart the sweep.
the relevant centre frequency. This method provides full control over the sweep process
by editing the internal memory contents without making any
D. SWEEPING METHOD changes to the FPGA code. The sweep control state machine
There is no specific criterion to determine the level of hard- diagram is shown in Fig. 8.
ware reconfigurability required to fit into the blurry defini- For this idea to work properly, the framing concept is
tion of SDR. The flexibility of the final solution is usually implemented for the data transport layer, instead of deliv-
one of the main benefits of fully software realisations over ering raw PSD samples to the host PC. Each frame can be
FPGA-aided alternatives. To tackle this concern, the sweep- distinguished from the others using this method and easily
ing pattern is not predefined and can be uploaded to the stitched to form the final wideband periodogram. Further-
sensor via the Lime API software provided by the manu- more, some losses resulting from probable USB overflows or
facturer. The form of a hopping table is saved in an FPGA errors could be resolved in contrast to a constant basic data
internal memory shared with the calibration data cache. stream. The detailed frame structure based on the preamble,
Figure 7 illustrates the structure of a single configuration payload, and checksum is provided in Fig. 9. Additionally, the
block. centre frequency information is included after the preamble.

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FPGA implementation because output bit-width is constant

and strictly defined in the design. Furthermore, the FPGA
module does not require any information regarding band-
width or gain, which is required for the reference level cal-
culation. Therefore, comparative characterisation with abso-
lute reference is applied to determine the real PSD offset in
relation to one milliwatt (dBm).
The laboratory setup was arranged to calibrate the SDR
readout with the E4432B Agilent Digital Signal Generator
in terms of signal power. In this experiment, the low-loss
coaxial cable connection between the reference generator and
SDR was established. A Constant Wave (CW) signal was
employed to identify the linear operation region and dBFS
offset level in relation to dBm. For narrowband analysis,
measurements were taken at 7.68 MHz bandwidth with a
maximum front-end RF gain of 73 dB to define the sensor’s
highest sensitivity area. Whereas, to observe strong signals in
FIGURE 8. Flow chart for the sweeping controller state machine. further wideband imaging experiments, the maximum sam-
pling of 96 MHz was applied, and the gain was adjusted
to 60 dB.
All instruments were turned on for 2 hours beforehand to
reach thermal equilibrium as postulated in [32]. To verify the
prepared measurement setup, the Rohde&Schwarz FSV Sig-
FIGURE 9. Data link layer frame structure with the range of the checksum
calculation indication. nal Analyzer was connected instead of the SDR to determine
the real power at the signal entry point. Following that, with
the reference signal generator turned off, 1000 trials of the
For a relatively simple method of validating data integrity, test statistic were captured, collecting 2048 PSD samples con-
a Fletcher’s algorithm is used as the checksum scheme [30]. taining only noise. Then, with the signal generator switched
on, a further 1000 trials were carried out with the signal
V. EXPERIMENTAL SETUP AND RESULTS generator power ranging from -155 dBm to -55 dBm in steps
The implementation outlined in this article is based on of 5 dBm. The signal power in each trial was determined, and
an Open-Source project [29] by LimeSDR-USB manufac- the final reading from all detection trials was obtained using
turer created with the VHSIC hardware description language maximum likelihood estimation. The measurement outcomes
(VHDL). It has been synthesised in Quartus Prime 20.1 and for various frequency ranges and bandwidths are compared
simulated in the integrated ModelSim software provided by in Fig. 10.
Intel. The synthesis results for the Intel CYCLONE IV E: A directly proportional relationship between signal genera-
EP4CE40F23C8 FPGA located on the LimeSDR-USB board tor power and proposed sensor indications at particular input
version 1.4s indicate: 120 MHz maximum system frequency, ranges can be observed in the graphs. However, at distinct
82% of overall logic resource utilisation with all M9K blocks frequencies, the device yields different readings for the same
allocation. The periodogram module is designed around the input power. This is related to the significant decrease in
dual independent fixed-point pipeline FFT IP cores integrated LNA gain as frequency increases. The difference between
into the framework. The evaluation of the proposed approach 1 GHz and 2 GHz is 10 dB, and between 2 GHz and 2.5 GHz
based on custom FPGA firmware is discussed in the follow- is 2.5 dB. The insertion losses of the analogue switch and
ing subsections, considering both real-life scenarios and some the matching transformer produce additional offsets that grow
laboratory measurements. with higher frequency. This is consistent with the measure-
ments provided in [33]. Therefore, a calibration factor is
A. LABORATORY MEASUREMENTS applied separately for each frequency to produce accurate
Numerous applications require not only spectrum imaging results. The correction is conducted on the software side of
but also accurate power readings. If the error sources are the system to achieve valid readings of received power and to
correctly identified, the FFT analysis can yield precise signal enable flexibility for future enhancements. The impact of the
measurements. These factors and how they can be mitigated calibration procedure in terms of total error is presented in
or compensated for are highlighted in [31]. The following Fig. 11. The criterion to evaluate measurement validity is the
procedures cover the suggested aspects of evaluating sinu- Mean Absolute Error (MAE), which is defined as follows:
soidal and narrowband signals. N
1 X
Decibel level with reference to full scale (dBFS) is a MAE = |t̂i − t|, (7)
straightforward approach to formatting the PSD output in N
i=1

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 P. Flak: Hardware-Accelerated Real-Time SA With a Broadband Fast Sweep Feature

FIGURE 11. The difference between the signal generator’s input power
and the SDR instrument reading after calibration.

including 0.5 s for each antenna changeover via analogue

switch. This demonstrated that frequency retuning takes
approximately 0.265 s to complete.
The process of data aggregation may be substantially
enhanced using the sensor proposed in this work. It is worth
noting that, despite considerable alteration of the FPGA
firmware, the user retains complete control over LimeSDR-
USB’s signal processing elements. Therefore, combining
oversampling with the digital filtering provided by the DSP
block inside the analogue front-end can reduce the data col-
lection period by up to 5.3 ms for a single frequency. The
additional time spent on FFT calculation is also unneeded
FIGURE 10. SDR sensor measurement results for various frequency sets
in this case since improved firmware computes it in parallel.
and bandwidths when loading a CW signal from a reference generator. Furthermore, the time required for frequency switchover may
The noticeable linear operation region can be used for accurate be altered to approximately 35 µs with a configuration set
measurements.
for dual centre frequency sweep with in-band repetitions.
LimeSDR-USB also gives the advantage of two independent
where t̂i is measured energy, t is the reference value and N is RX channels that operate in parallel but share the same
the trial length. The final measurements demonstrate that the frequency synthesizer. This feature, as detailed in the source
SDR sensor is accurate to 0.5 dBm over the linear operation paper, might be advantageous in dual antenna arrangements.
area, with MAE of 0.29 dBm. Unfortunately, the throughput of the interconnection between
the FPGA and the RF front-end limits data transfer at the
B. RF PROPAGATION STUDIES maximum ADC rate to only one channel. However, parallel
The project presented in [34] employs a portable, low-cost sampling is possible and channel selection can be done by
SDR for measuring RF propagation in urban areas. The changing the data source for the digital front-end interface.
experiments were performed with 2.048 MHz bandwidth In comparison to retuning time, the latency of this procedure
settings for 71 MHz and 869.525 MHz centre frequencies is negligible.
simultaneously. Since the data was collected in motion, the These analyses, combined with laboratory measurements,
instrument should, according to the article, enable a rapid lead to the conclusion that a proposed sensor can be mounted
transition between two bands, allowing both readings to be on a fast-moving object to achieve greater coverage in less
obtained at the same time and location. The measurement time. It is also possible to reduce the dislocation between
cycle to provide the desired spatial resolution is estimated successive measurements. Nevertheless, it should be noted
to be two seconds, which corresponds to the typical human that the proposed solution is slightly more expensive but may
walking speed. Shortening the data collection period is also still be considered cost-effective.
important for concentrating more readings in one location.
The data gathering stage for obtaining 5000 samples C. LTE COVERAGE AND UTILISATION ANALYSIS
100 times took 0.24 s and was prolonged to 0.36 s when Researchers around the world are constantly interested in
combined with the FFT processing and averaging. The tracking Long Term Evolution (LTE) signals, both for
entire acquisition period for both frequencies was 2.25 s, coverage studies [35], [36] and for estimation of channel

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P. Flak: Hardware-Accelerated Real-Time SA With a Broadband Fast Sweep Feature

are sent. The granularity achieved was 900 µs, which is less
than the LTE scheduling interval.
In a related experiment, a multiband omnidirectional LTE
antenna (AO-ALTE-G016LS) was connected to the sensor
and installed in a window on the fourth level of a multi-story
residential building in the highly urbanised area. The pro-
FIGURE 12. Characteristics of the LTE band division with operator
allocation details.
posed sensor was configured for 96 MHz real-time bandwidth
with 50 dB gain, and the cache memory was filled to support
jumps over all listed LTE centre frequencies. To achieve the
TABLE 1. Overview of the LTE downlink bands operated in poland with
channel parameters.
fastest possible sweep speed, a single PSD estimation was
obtained for each band. The entire measurement cycle, which
consisted of 53 µs of data acquisition followed by 35 µs
of blind time, led to a total scan time of around 528 µs for
6 disjoint bands. This period is still lower than the LTE single
sub-frame time of 1 ms. As a result, the readings can be
refreshed at a rate of more than 1890 times per second. The
accumulated average channel energy across all bands for an
operator with the highest bandwidth allocation is compared.
utilisation [37], [38]. LTE bands B1 to B71 are distributed The findings normalised to the highest power in each channel
throughout a wide and discontinuous range of spectrum fre- are demonstrated in Fig. 13. Furthermore, the spectrogram
quencies, occupying up to a 90 MHz bandwidth [39]. The for the band B1 is extracted and provided as a reference
proposed sensor is ideally suited to monitoring these types in Fig. 14.
of transmissions due to its appropriate real-time bandwidth. The daily variation in mobile traffic volume is primarily
Therefore, each band in the mentioned range can be inspected influenced by user actions. During the day, the average utili-
to its full extent in one scan without the need to retune. sation across the bands was found to be high and fairly stable.
The Polish mobile market is managed by four providers This changes significantly at night when energy spikes and
who operate on the common bands in exclusively allocated uneven allocation patterns can be seen. Furthermore, it was
channels. Table 1 outlines the LTE bands that are currently in discovered from the spectrogram perspective that operator D
use, according to the list of references gathered at [40]. Addi- does not use the B1 band for wideband LTE, and a spectral
tionally, utilisation details with concerning operator channel gap in the measurement zone can be observed.
assignment are presented in Fig. 12.
During an experiment performed with the sensor proposed D. RADIO ENVIRONMENT AWARENESS FOR DYNAMIC
in [27], the 1.9 GHz to 2.1 GHz spectrum was swept in three SPECTRUM ACCESS
80 MHz steps, at a rate of 375 µs per 100 MHz. An aver- The demand for access to the radio frequency spectrum
age power level recorded in the individual channels was is constantly increasing as a result of the proliferation of
used to illustrate the utilisation level since the LTE protocol radio communication tools and services. A new manage-
only allocates energy to subcarriers when downlink packets ment paradigm is necessary to resolve the problem of the

FIGURE 13. Temporal traffic dynamics in mobile network for operator D allocation outlined in Fig. 12, obtained by channel energy
estimation during broadband sweep in urbanised area.

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FIGURE 15. A method for merging adjacent parts of the spectrum that
eliminates signal distortion caused by edge filter roll-off and DC spike
inducted by FFT calculation.

Users (SU) do not interact negatively with Primary Users

(PU). This activity often has a local character, and there-
fore the principle of Radio Environment Mapping (REM)
aims to provide electromagnetic situational awareness for CR
networks. The methods for creating maps based on spatial
statistics with various sensor counts are discussed in [41].
The good propagation properties for different types of
communication achievable in the TV White Spaces (TVWS)
have attracted many researchers worldwide [42], [43], [44].
The TVWS are frequencies that are unoccupied, under-
used, or interleaved between broadcast TV channels, usually
between 470 MHz and 694 MHz. The capabilities of the
proposed sensor for white space blind detection and thus for
creating dynamic REMs that represent the local state of the
radio spectrum will be investigated.
The configuration of the sensor in this scenario differs from
FIGURE 14. B1 band spectrogram derived from a simultaneous sweep that for monitoring LTE signals, where the sub-bands are
over all LTE channels used in Poland. The spectral utilisation gap can be precisely allocated along with the guard bands among them.
observed in the area of operator D allocation.
Moreover, the device centre frequency may be placed in the
guard band space while the real-time observation region is
sufficient to image the full sub-band. The case is changing for
present frequency licensing regime, which results in the vast blind scans above real-time bandwidth. Despite advanced DC
majority of the spectrum being underutilised. The problem of filtering, some distortion in the area of the centre FFT bin, that
spectrum scarcity is now substantially addressed by dynamic may affect the observed signal, will always be present. For
management, which uses Cognitive Radio (CR) technology that reason, an internal overlap stitching method is applied in
for opportunistic medium access. This idea allows the poten- the white space detection scenario. This process is demon-
tial utilisation of unused spectrum, provided that Secondary strated in Fig. 15.

FIGURE 16. Comparison of proposed sensor indication with FieldFox Spectrum Analyzer. Some amplitude differences between signals are
caused primarily by the inability to provide perfect trigger synchronisation and different sweep approach.

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To ensure an identical input signal for the proposed sen- signal processing. The goal will be to replace two indepen-
sor and the Agilent FieldFox N9912A Spectrum Analyzer dent FFT calculation modules with a single dual-channel that
(SA), an experimental set with a single antenna (Hama, shares constant twiddle coefficients. Currently, with the IP
DVB-T/DVB-T2 Rod Antenna) and RF splitter (Fairview, core provided in the framework for fixed-point operations,
MPR18-2) was applied. In both cases, the span range was it is not possible. Alternatively, the low-complexity Welch’s
set at 470 MHz-700 MHz, and the RBW of SA was adjusted algorithm modification [45], which reduces the size of FFT
to 3 kHz with a preamplifier to achieve a noise floor of to M/2 at the price of some accuracy loss, is promising and
around −98 dBm. The proposed sensor used a maximum will be investigated. In addition, characterisation for a wider
real-time bandwidth of 96 MHz, 60 dB front-end gain, and the range of bandwidth and gain combinations will be arranged.
centre frequency step was set as 24 MHz to support overlap In order to construct a broader calibration matrix, an effort
stitching in post-processing. To cover the selected frequency will be made to automate the reference generator control and
span in that manner, eight sweep steps were necessary. As a data gathering operations. Based on the studies discussed,
result, a complete scan for SDR took 704 µs, whereas for SA the sensor appears to be suitable for a variety of experiments
it was 4.5 s. The measured signals are shown in Fig. 16. in mobile applications. Thus, in future development, a GPS
The inability to fully synchronise the trigger time to store receiver will be directly connected to the FPGA, allowing the
the data causes some slight variations between the two mea- hardware to incorporate time and position information into
surements. The SA is a portable device with integrated dis- each data frame, increasing the sensor’s autonomy.
play, and the capture process is initiated by pushing a button.
Furthermore, SA does not use FFT but retunes the RBW REFERENCES
filter through the span range as in the classic sweep tech- [1] Mobile Networks and Spectrum—Meeting Future Demand for Mobile
nique, which would result in a better noise level in exchange Data, OFCOM, London, U.K., Feb. 2022. [Online]. Available:
https://www.ofcom.org.uk/_data/assets/pdf_file/0017/232082/mobile-
for scan time. The occupancy information of the selected spectrum-demand-discussion-paper.pdf
sub-bands is substantially similar, despite the fact that the [2] A. Al-Hourani, V. Trajkovic, S. Chandrasekharan, and S. Kandeepan,
two signals are not always identical in amplitude. This is ‘‘Spectrum occupancy measurements for different urban environments,’’
in Proc. Eur. Conf. Netw. Commun. (EuCNC), Jun. 2015, pp. 97–102.
also an effect of different sweep and average approaches. [3] A. Ayeni, N. Faruk, O. Bello, O. Sowande, S. Onidare, and M. Muhammad,
An almost regular distribution of TV signals and guard bands ‘‘Spectrum occupancy measurements and analysis in the 2.4–2.7 GHz band
can be observed over the entire scan range, apart from the in urban and rural environments,’’ Int. J. Future Comput. Commun., vol. 5,
p. 147, May 2016.
central area near 585 MHz, where a noticeable white space is [4] B. K. Engiz and Y. A. Rajab, ‘‘Investigation of spectrum occupancy in
present. GSM band in Samsun, Turkey,’’ in Proc. 6th Int. Conf. Electr. Electron.
Eng. (ICEEE), Apr. 2019, pp. 158–161.
[5] L. Shi, P. Bahl, and D. Katabi, ‘‘Beyond sensing: Multi-GHz realtime
VI. CONCLUSION AND FUTURE WORK spectrum analytics,’’ in Proc. 12th USENIX Symp. Networked Syst. Design
This paper presents a hardware-accelerated realisation of a Implement. Oakland, CA, USA: USENIX Assoc., May 2015, pp. 159–172.
broadband RF spectrum sensor based on a cost-effective SDR [6] F.-L. Chiper, A. Martian, C. Vladeanu, I. Marghescu, R. Craciunescu, and
O. Fratu, ‘‘Drone detection and defense systems: Survey and a software-
platform. A brief introduction to SDR technology is given ini- defined radio-based solution,’’ Sensors, vol. 22, no. 4, p. 1453, Feb. 2022.
tially as a foundation for further discussions. An overview of [7] J. J. Yang, D. Chen, H. Tang, J. Yu, and M. Huang, ‘‘Cooperative com-
different spectrum sensing solutions was then outlined, along pressed spectrum sensing model for regional radio monitoring,’’ in Proc.
31st URSI Gen. Assem. Sci. Symp. (URSI GASS), Aug. 2014, pp. 1–4.
with an investigation of their potential for broadband analysis. [8] J. Schuette, B. Fell, J. Chapin, S. Jones, J. Stutler, M. Birchler, and
Following that, implementation details and techniques for D. Roberson, ‘‘Performance of RF mapping using opportunistic distributed
sweeping process acceleration were presented. devices,’’ in Proc. IEEE Mil. Commun. Conf., Oct. 2015, pp. 1624–1629.
[9] P. Skokowski, K. Malon, and J. Łopatka, ‘‘Building the electromagnetic
In the proposed approach, the FPGA contribution was situation awareness in MANET cognitive radio networks for urban areas,’’
extended to send a calculated Welch’s spectrum estimator Sensors, vol. 22, no. 3, p. 716, Jan. 2022.
over the USB interface instead of raw IQ data. As a result, [10] P. Flak, ‘‘Drone detection sensor with continuous 2.4 GHz ISM band
coverage based on cost-effective SDR platform,’’ IEEE Access, vol. 9,
without the requirement to pre-evaluate any time-frequency pp. 114574–114586, 2021.
domain transform, the entire computing power of the host PC [11] A. Martian, ‘‘Real-time spectrum sensing using software defined radio
may be used for further calculations. In addition, the sweep- platforms,’’ Telecommun. Syst., vol. 64, no. 4, pp. 749–761, Apr. 2017.
[12] J. Mitola, ‘‘Software radios: Survey, critical evaluation and future direc-
ing control engine with cache calibration memory was also tions,’’ IEEE Aerosp. Electron. Syst. Mag., vol. 8, no. 4, pp. 25–36,
hardware arranged to reduce retuning latency and blind time. Apr. 1993.
The validation results demonstrate that the sensor may be [13] N. Kassri, A. Ennouaary, S. Bah, and H. Baghdadi, ‘‘A review on SDR,
spectrum sensing, and CR-based IoT in cognitive radio networks,’’ Int.
applied for power measurements with a 0.5 dB accuracy after J. Adv. Comput. Sci. Appl., vol. 12, no. 6, pp. 1–22, 2021.
calibration. The operating frequency range from 100 kHz to [14] A. Wolke. What’s Your IQ—About Quadrature Sig-
3.6 GHz enables the instrument to be applied in a number nals. Accessed: May 30, 2022. [Online]. Available:
https://www.tek.com/en/blog/quadrature-iq-signals-explained
of scenarios. However, the inability to monitor 5 GHz WiFi [15] Ettus Research. The USRP B210. Accessed: May 30, 2022. [Online].
signals without additional accessories may be considered a Available: https://www.ettus.com/all-products/ub210-kit/
fundamental limitation of the proposed device. [16] Great Scott Gadgets. The HackRF. Accessed: May 30, 2022. [Online].
Available: https://greatscottgadgets.com/hackrf/
Further optimisation of the FPGA code will be the subject [17] Lime Microsystems. The LimeSDR. Accessed: May 30, 2022. [Online].
of future work to provide the resources required for additional Available: https://limemicro.com/products/boards/limesdr/

VOLUME 10, 2022 110945

 P. Flak: Hardware-Accelerated Real-Time SA With a Broadband Fast Sweep Feature

[18] D. M. Molla, H. Badis, L. George, and M. Berbineau, ‘‘Software [37] J. Yuan, A. Huang, and H. Shan, ‘‘Resource management of LTE-U sys-
defined radio platforms for wireless technologies,’’ IEEE Access, vol. 10, tems for channel utilization and user satisfaction,’’ IEEE Access, vol. 7,
pp. 26203–26229, 2022. pp. 107473–107490, 2019.
[19] N. Bello and K. O. Ogbeide, ‘‘Designing a real-time swept spectrum [38] S. Park, M. Agiwal, H. Kwon, and H. Jin, ‘‘An evaluation methodology
analyser with USRP B210,’’ Nigerian J. Environ. Sci. Technol., vol. 5, for spectrum usage in LTE-A networks: Traffic volume and resource
no. 2, pp. 329–339, Oct. 2021. utilization perspective,’’ IEEE Access, vol. 7, pp. 67863–67873, 2019.
[20] Ettus Research. The USRP X310. Accessed: May 30, 2022. [Online]. [39] Electronics Notes. (2021). LTE Frequency Bands, Spectrum & Channels.
Available: https://www.ettus.com/all-products/x310-kit/ Accessed: May 30, 2022. [Online]. Available: https://www.electronics-
[21] Tektronix. Fundamentals of Real-Time Spectrum Analysis. Accessed: notes.com/articles/connectivity/4g-lte-long-term-evolution/frequency-
May 30, 2022. [Online]. Available: https://download.tek.com/document/ bands-channels-spectrum.php
37W_17249_5_HR_Letter.pdf [40] Wikipedia Contributors. (2022). List of LTE Networks in
[22] Tektronix. RSA500 Series Real Time Spectrum Analyzers. Accessed: Europe. Accessed: May 30, 2022. [Online]. Available:
May 30, 2022. [Online]. Available: https://www.tek.com/en/products/ https://en.wikipedia.org/wiki/List_of_LTE_networks_in_Europe#Comm
spectrum-analyzers/rsa500 ercial_deployments
[23] W. Liu, D. Pareit, E. D. Poorter, and I. Moerman, ‘‘Advanced spec- [41] P. Kaniewski, J. Romanik, E. Golan, and K. Zubel, ‘‘Spectrum aware-
trum sensing with parallel processing based on software-defined radio,’’ ness for cognitive radios supported by radio environment maps: Zonal
EURASIP J. Wireless Commun. Netw., vol. 2013, no. 1, p. 228, Dec. 2013. approach,’’ Appl. Sci., vol. 11, no. 7, p. 2910, Mar. 2021.
[24] Y. Molina-Tenorio, A. Prieto-Guerrero, and R. Aguilar-Gonzalez, ‘‘Real- [42] E. Mureu, P. Kihato, and P. Langat, ‘‘The authorization of the use of TV
time implementation of multiband spectrum sensing using SDR technol- white spaces: The Kenyan scenario,’’ in Proc. Sustain. Res. Innov. Conf.,
ogy,’’ Sensors, vol. 21, no. 10, p. 3506, May 2021. 2022, pp. 102–106.
[25] M. B. Perotoni and K. M. G. D. Santos, ‘‘SDR-based spectrum analyzer [43] T. Chakraborty, H. Shi, Z. Kapetanovic, B. Priyantha, D. Vasisht, B. Vu,
based in open-source GNU radio,’’ J. Microw., Optoelectron. Electromagn. P. Pandit, P. Pillai, Y. Chabria, A. Nelson, M. Daum, and R. Chandra,
Appl., vol. 20, no. 3, pp. 542–555, Sep. 2021. ‘‘Whisper: IoT in the TV white space spectrum,’’ in Proc. 19th USENIX
[26] M. Ossmann and D. Spill. (2017). What’s on the Wireless? Automating Symp. Networked Syst. Design Implement. (NSDI). Renton, WA, USA:
RF Signal Identification. Accessed: May 30, 2022. [Online]. Available: USENIX Assoc., Apr. 2022, pp. 401–418.
https://www.blackhat.com/docs/us-17/wednesday/us-17-Ossmann- [44] E. Orumwense and K. Abo-Al-Ez, ‘‘Exploiting TV white spaces for smart
Whats-On-The-Wireless-Automating-RF-Signal-Identification-wp.pdf grid communications,’’ J. Commun., vol. 15, p. 613, Jul. 2020.
[27] Y. Guddeti, R. Subbaraman, M. Khazraee, A. Schulman, and D. Bharadia, [45] K. K. Parhi and M. Ayinala, ‘‘Low-complexity Welch power spectral
‘‘SweepSense: Sensing 5 GHz in 5 milliseconds with low-cost radios,’’ in density computation,’’ IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 61,
Proc. NSDI, 2019, pp. 317–330. no. 1, pp. 172–182, Jan. 2014.
[28] P. D. Welch, ‘‘The use of fast Fourier transform for the estimation of
power spectra: A method based on time averaging over short, modified
periodograms,’’ IEEE Trans. Audio Electroacoust., vol. AE-15, no. 2,
pp. 70–73, Jun. 1967.
[29] Myriad-RF. (2020). LimeSDR-USB. [Online]. Available: https://
github.com/myriadrf/LimeSDR-USB
[30] J. Fletcher, ‘‘An arithmetic checksum for serial transmissions,’’ IEEE
Trans. Commun., vol. COM-30, no. 1, pp. 247–252, Jan. 1982.
[31] S. Scholl. (2016). Exact Signal Measurements using FFT Analysis.
[Online]. Available: http://nbn-resolving.de/urn:nbn:de:hbz:386-kluedo- PRZEMYSŁAW FLAK was born in Katowice,
42930 Poland. He received the B.S. and M.S. degrees
[32] T. Šolc, M. Mohorčič, and C. Fortuna, ‘‘A methodology for experimental in electronic engineering from the Silesian Uni-
evaluation of signal detection methods in spectrum sensing,’’ PLoS ONE, versity of Technology, Gliwice, Poland, in 2010,
vol. 13, no. 6, Jun. 2018, Art. no. e0199550. where he is currently pursuing the Ph.D. degree.
[33] Lime Microsystems. RF and Analog Measurement Results. Accessed: Since 2009, he has been with Flytronic SA,
May 30, 2022. [Online]. Available: https://limemicro.com/app/uploads/ WB Group, Poland, where he is working on
2015/08/LMS7002M_Measurements-v1_05.pdf
research and development topics related to drones,
[34] D. P. Wright and E. A. Ball, ‘‘Highly portable, low-cost SDR instrument
programmable systems, and radio telecommu-
for RF propagation studies,’’ IEEE Trans. Instrum. Meas., vol. 69, no. 8,
pp. 5446–5457, Aug. 2020. nication. His current research interests include
[35] M. Patlayenko, O. Osharovska, and V. Solodka, ‘‘Comparison of LTE unmanned aerial systems (UAS), counter-UAS systems (C-UAS), software
coverage areas in three frequency bands,’’ in Proc. IEEE 4th Int. Conf. defined radio (SDR), and field programmable gate arrays (FPGA). He was
Adv. Inf. Commun. Technol. (AICT), Sep. 2021, pp. 212–215. a recipient of the 5th Annual Digilent Design Contest Award, in 2009, orga-
[36] I. Surahmat and U. L. Hakim, ‘‘Mobile scanning of LTE frequency with nized within the Technical University of Cluj-Napoca, Romania, sponsored
SDR technology,’’ in Proc. 1st Int. Conf. Electron. Electr. Eng. Intell. Syst. by Digilent and Xilinx.
(ICE3IS), Oct. 2021, pp. 76–79.

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