0% found this document useful (0 votes)
285 views13 pages

Exp4 - Designing Multiplexer (MUX) and De-Multiplexer (DEMUX), Priority Encoder and Decoder Circuits

The lab report details the design and implementation of multiplexers, demultiplexers, priority encoders, and decoders using simple gates, emphasizing their importance in digital logic systems. The experiment involved circuit simulations and practical assembly, with results confirming the theoretical predictions through comparisons of outputs. Overall, the study reinforced fundamental concepts in digital electronics and highlighted the significance of these combinational circuits in data handling and signal processing.

Uploaded by

Musfiqur Rahman
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
285 views13 pages

Exp4 - Designing Multiplexer (MUX) and De-Multiplexer (DEMUX), Priority Encoder and Decoder Circuits

The lab report details the design and implementation of multiplexers, demultiplexers, priority encoders, and decoders using simple gates, emphasizing their importance in digital logic systems. The experiment involved circuit simulations and practical assembly, with results confirming the theoretical predictions through comparisons of outputs. Overall, the study reinforced fundamental concepts in digital electronics and highlighted the significance of these combinational circuits in data handling and signal processing.

Uploaded by

Musfiqur Rahman
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 13

AMERICAN INTERNATIONAL UNIVERSITY–BANGLADESH

(AIUB)

FACULTY OF SCIENCE & TECHNOLOGY

Fall 2024-25

DIGITAL LOGIC AND CIRCUITS LAB: 04

Section: P (GROUP-1)

LAB REPORT ON:

Designing Multiplexer (MUX) and De-multiplexer (DEMUX),


Priority Encoder and Decoder Circuits

Supervised By

DR. TANBIR IBNE ANOWAR

Submitted By: SHADMAN SHAKIB

Name ID
1. ALIF HASAN KHAN 23-50186-1
2. MD. YEAHYEA JAM 23-50187-1
3. MOHSIN IBNA HOSSAIN 23-50194-1
4. SHADMAN SHAKIB 23-50200-1
5. MD. MOUDUD AHMED ALVE 23-50224-1

Date of Submission: 29-Oct-2024

1|Page
Abstract
This experiment focused on the design and performing of multiplexers, demultiplexers,
priority encoder, and decoder. Every one of the circuits was built up with simple gates for the
aim of studying the capacity of these gates for data transmission, conversion and signaling.
The theory was further confirmed through circuit simulations followed by analysis of results
attained from the trainer board. These observations emphasized the central importance of
these circuits in digital logic systems as well as a comparison of the experimental and
theoretical results.

Introduction
Multiplexer : A multiplexer, often referred to as MUX, is a combinational circuit designed to
channel multiple input lines into a single output line. It is commonly used to select one input
from 2n possible inputs based on the values of n selection lines. This enables efficient routing
of binary data from multiple sources to a single destination, making it a key component in
digital systems. [1]
The multiplexer consists of 2n input lines, n selection lines, and one output line. The selection
lines determine which input line is connected to the output at any given moment. This design
makes it suitable for data transmission and control applications, where multiple sources need
to share a single channel. [1]
A 4×1 multiplexer, also referred to as a 4-to-1 multiplexer, is a combinational circuit that
selects one of four input signals and forwards it to a single output. The selection of the input
to be routed to the output is determined by two selection lines, S0 and S1. [3]

Figure 1 : 4×1 multiplexer [2]

Boolean expression for 4×1 multiplexer, Y = 𝑆1’𝑆0’I0 + 𝑆1’𝑆0I1 + 𝑆1𝑆0’I2 + 𝑆1𝑆0I3


[3]
The relationship between the number of inputs (n) and selection lines (m) is governed by the
formula m=log2(n). For a 4×1 multiplexer, log2(4)=2, meaning two selection lines are
required to choose among the four inputs. In the block diagram of a 4×1 multiplexer, the
inputs I0,I1,I2, and I3 represent the data lines. The selection lines S 0 and S1 control which input
is passed to the output Y. The output is based on the binary combination of the selection
inputs. [3]
Demultiplexer : A demultiplexer, abbreviated as DEMUX, is a combinational circuit
designed to take a single input and distribute it across multiple output lines. This circuit is
often referred to as a data distributor, as it enables the same input data to be sent to different
destinations. The selection lines determine which output channel receives the input at any

2|Page
given time. In essence, a demultiplexer performs the opposite operation of a multiplexer.
While a multiplexer combines multiple inputs into a single output, a demultiplexer takes one
input and routes it to one of several outputs. A demultiplexer is commonly characterized as a
1-to-2n device, where n represents the number of selection lines. 2 n is the number of output
lines. [4]
The selection lines control the routing of the input signal to one specific output channel. This
makes demultiplexers integral in digital systems, particularly in applications like digital
decoding and Boolean function generation. [5]

Figure 2 : 1×4 demultiplexer [5]

A 1×4 demultiplexer is a combinational logic circuit that takes a single input and distributes it
to one of four output lines based on the control of two selection lines. This type of
demultiplexer is commonly used in digital systems to send a single data signal to multiple
destinations, depending on the combination of the selection inputs. [5]
Encoders and decoders are fundamental combinational circuits used in digital electronics to
process and manipulate binary data. Although they serve complementary roles, their
purposes, operations, and applications are distinct. Below is an overview of each, followed by
a comparison of their differences. [6]
Encoder : An encoder is a combinational circuit that transforms input data into a coded
binary format. It reduces multiple input signals into a smaller number of output lines,
producing a binary representation of the active input. Encoders are typically used at the
transmitting end of communication systems, as they prepare data for transmission or
processing. [6]
Decoder : A decoder is a combinational circuit that performs the reverse function of an
encoder. It converts binary-coded data into a set of output signals, typically activating one
output line corresponding to the input combination. Decoders are mainly used at the receiving
end of systems to retrieve the original data from the encoded binary signal. [6]

Figure 3 : 2×4 decoder [6]

Priority Encoder : A priority encoder is a specialized combinational logic circuit that


converts multiple input signals into a binary code, but with a significant feature: it assigns

3|Page
priority to its inputs. Unlike standard encoders, which can produce ambiguous outputs when
more than one input is active, a priority encoder ensures that only the highest-priority active
input generates the output. [7]

Figure 4 : 4×2 Priority encoder [7]

A 4-to-2 priority encoder is a combinational circuit that accepts four input signals
(D0,D1,D2,D3 ) and outputs a 2-bit binary code (Q 1,Q0) corresponding to the highest-priority
active input. If multiple inputs are active simultaneously, the circuit ensures that the binary
output represents the input with the highest assigned priority. [7]

Methodology
This experiment focused on designing, simulating, and implementing combinational circuits,
including a 4-to-1 multiplexer, 1-to-4 demultiplexer, 2-to-4 decoder and priority encoder.
Boolean expressions were derived from truth tables, circuits were implemented using IC
gates on a trainer board, and simulations validated theoretical designs. Practical results were
compared with expected outputs, ensuring accuracy and component safety.
Apparatus :
 Digital trainer board
 IC 7408:2 pcs
 IC 7404:2 pcs
 IC 7432:2 pcs
 IC 74LS11:2 pcs
 Connecting wires

Experimental Procedure:
 Logical expressions were derived from the truth tables of each circuit.
Schematics were created for the 4-to-1 multiplexer, 1-to-4 demultiplexer, 2-to-4
decoder, decimal-to-BCD encoder, and priority encoder.|

 Each circuit was simulated using PSIM software to ensure the outputs matched the
theoretical truth tables.

 The circuits were built on the trainer board using the required IC gates and connecting
wires.
Inputs were provided using toggle switches, and outputs were connected to LEDs for
observation.

4|Page
 The toggle switches were adjusted to apply various combinations of input signals.
Output signals were recorded and compared to the expected theoretical outputs for
validation.
 Any discrepancies between practical and theoretical results were investigated.
Adjustments were made to connections or components as needed to ensure proper
functioning.

Simulation And Result

Table 1 : Truth Table for 4×1 Multiplexer


Inputs Outputs
S1 S0 Y
0 0 D0
0 1 D1
1 0 D2
1 1 D3

Input & Output Experimental Circuit Simulatated Circuit


4×1 Multiplexer :

Y = 𝑆1’𝑆0’𝐷0 +
𝑆1’𝑆0𝐷1 +
𝑆1𝑆0’𝐷2 + 𝑆1𝑆0𝐷3

1. Input : S1 =0
S0= 0
D0=1

Output:
Y= 1

2. Input : S1 =0
S0= 1
D1=1

Output:
Y= 1

5|Page
3. Input : S1 =1
S0 = 0
D2 =1

Output:
Y= 1

4. Input : S1 =1
S0 = 1
D3 =1

Output:
Y= 1

6|Page
Table 2 : Truth Table for 1×4 Demultiplexer
Inputs Outputs
S1 S0 Di D0 D1 D2 D3
n
0 0 1 1 0 0 0
0 1 1 0 1 0 0
1 0 1 0 0 1 0
1 1 1 0 0 0 1

Input & Output Experimental Circuit Simulatated Circuit


1×4 Demultiplexer :

1. Input : S1 =0
S0= 0
Din=1

Output: 𝐷0 =
𝑆1’𝑆0’𝐷𝑖𝑛

D0 = 1
D1 = 0
D2 = 0
D3 = 0

2. Input : S1 =0
S0 = 1
Din=1

Output: 𝐷1 =
𝑆1’𝑆0𝐷𝑖𝑛

D0 = 0
D1 = 1

7|Page
D2 = 0
D3 = 0

3. Input : S1 =1
S0= 0
Din=1

Output: 𝐷2 =
𝑆1𝑆0’𝐷𝑖𝑛

D0 = 0
D1 = 0
D2 = 1
D3 = 0

4. Input : S1 =1
S0= 1
Din=1

Output: 𝐷3 =
𝑆1𝑆0𝐷𝑖𝑛

D0 = 0
D1 = 0
D2 = 0
D3 = 1

Table 3 : Truth Table for 2×4 Decoder


Inputs Outputs
A B D0 D1 D2 D3

0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1

8|Page
Input & Output Experimental Circuit Simulatated Circuit
2×4 Decoder :

1. Input : A =0
B=0

Output: D0 = A’B’
D0 = 1
D1 = 0
D2 = 0
D3 = 0

2. Input : A =0
B=1

Output: D1 = A’B
D0 = 0
D1 = 1
D2 = 0
D3 = 0

3. Input : A =1
B=0

Output: D2 = AB’
D0 = 0
D1 = 0
D2 = 1
D3 = 0

4. Input : A =1
B=1

Output: D3 = AB
D0 = 0
D1 = 0
D2 = 0
D3 = 1

9|Page
Table 4 : Truth Table for 4×2 Priority encoder ( I2>I1>I3>I0 )
Inputs Outputs
I3 I2 I1 I0 Y1 Y0
x 1 x x 1 0
x 0 1 x 0 1
1 0 0 x 1 1
0 0 0 1 0 0

Input & Output Experimental Circuit Simulatated Circuit


4×2 Priority
encoder :

Y0 = I2’I1 + I3I2’I1’
Y1 = I2 + I3I2’I1’

1. Input : I3 =x
I2= 1
I1= x
I0= x
Output:
Y1= 1

10 | P a g e
Y0= 0

2. Input : I3 =x
I2= 0
I1= 1
I0= x

Output:
Y1= 0
Y0= 1

3. Input : I3 =1
I2= 0
I1= 0
I0= x

Output:
Y1= 1
Y0= 1

4. Input : I3 =0
I2= 0
I1= 0
I0= 1

Output:
Y1= 0
Y0= 0

Discussion
The experiment successfully demonstrated the principles and practical applications of
multiplexers, demultiplexers, encoders, and decoders in digital logic circuits. Through the
design, simulation, and physical implementation of these circuits, the theoretical concepts
were verified effectively. The comparison between the experimental outputs and the
theoretical truth tables highlighted the accuracy of the implemented circuits, as well as the
reliability of the simulation software. The implemented circuits functioned as expected, and
the outputs closely matched the theoretical truth tables, validating the Boolean expressions
used. Simulations using MULTISIM software provided a reliable way to cross-check the
theoretical designs before physical implementation. This step minimized errors in circuit
assembly. Minor discrepancies between theoretical and practical outputs were observed in

11 | P a g e
initial trials. These were primarily due to loose connections, incorrect wiring, or faulty ICs.
Adjustments and re-testing ensured proper circuit functioning. The experiment emphasized
the need for careful selection and handling of components, as even small issues like
improperly connected IC pins could impact results.

Conclusion
The experiment achieved its objectives of designing, simulating, and implementing
multiplexers, demultiplexers, encoders, and decoders. The theoretical and practical outputs
were in agreement, demonstrating the accuracy and significance of these combinational
circuits in digital electronics. This study reinforced the fundamental concepts of digital logic
and showcased their applications in efficient data handling and signal processing in modern
digital systems. Future experiments could focus on integrating these components into more
complex systems to explore their advanced applications.

Reference
[1] Multiplexer in digital Electronics - Javatpoint. (n.d.). www.javatpoint.com.
https://www.javatpoint.com/multiplexer-digital-electronics

[2] GeeksforGeeks. (2024b, September 27). Multiplexers in digital logic.


GeeksforGeeks. https://www.geeksforgeeks.org/multiplexers-in-digital-logic/

[3] Fahad, E., & Fahad, E. (2022, August 30). Multiplexer in digital electronics,
block diagram, designing, and logic diagram. Electronic Clinic.
https://www.electroniclinic.com/multiplexer-in-digital-electronics-block-diagram-
designing-and-logic-diagram/

[4] Digital Electronics - demultiplexers. (n.d.).


https://www.tutorialspoint.com/digital-electronics/digital-electronics-
demultiplexers.htm
[5] GeeksforGeeks. (2024a, July 29). What is Demultiplexer(DEMUX)?
GeeksforGeeks. https://www.geeksforgeeks.org/what-is-demultiplexerdemux/
[6] Admin. (2022a, September 30). Difference between encoder and decoder.
BYJUS. https://byjus.com/gate/difference-between-encoder-and-decoder/
[7] GeeksforGeeks. (2024b, September 27). Encoder in digital logic.
GeeksforGeeks. https://www.geeksforgeeks.org/encoder-in-digital-logic/

12 | P a g e
13 | P a g e

You might also like