Name ECE 102, Midterm 2
Given the circuit above. The circuit can be considered to have two cascade gain stages,
including the first stage from the input v2-v1 to vo1, and the second stage vo1 to vo.
Given the following parameters:
- Ideal voltage source VDD = 5 V, and ideal current source 𝐼𝑟𝑒𝑓 = 10 uA
- Technology parameters:
o PMOS: Vt,p = - 0.62 V, 𝜇𝑝 𝐶𝑜𝑥 = 36 uA/V2, 𝜆𝑝 =0.019 [1/V]
o NMOS: Vt,n = 0.48 V, 𝜇𝑛 𝐶𝑜𝑥 = 90 uA/V2, 𝜆𝑛 =0.025 [1/V]
- Input voltages:
𝑣
o 𝑣2 = 𝑣𝐶𝑀 + 2𝑑
𝑣
o 𝑣1 = 𝑣𝐶𝑀 − 2𝑑
o The input differential voltage: 𝑣𝑑 = 3 mV
o Common-mode input voltage: 𝑣𝐶𝑀 = 𝑉𝐶𝑀 + 𝑣𝑐𝑚
▪ Given: 𝑉𝐶𝑀 = 3.5 𝑉 and 𝑣𝑐𝑚 = 0.2𝑉
- Transistor length:
o M1, M2, and M6: L1=L2= L6=0.5 um.
o L = 1 um for all other transistors.
- Width of the transistors:
o W1-5 = 10 um
o W6 = 100 um
o W7-10 = 5 um
o W11,12 = 10 um
o W13,14 = 50 um
- Resistors:
o R1 = R2 = R3 = R4 = R5 = 10 kΩ
o R6 = 2 MΩ
In your solution, you can draw small signal circuit, if necessary, but it is not required unless
specifically stated.
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Name ECE 102, Midterm 2
1. [10 pts] Identify the gain stages and transistor functions
a. What are the configurations (names) of the two gain stages?
b. What is the function of the transistors at the bottom, M7-M14?
c. What is the function of M3, M4, R3, and R4?
2. [45 pts] DC-Bias and common-mode range
In all the calculations below, assume all transistors in saturation and the differential voltage
𝑣𝑑 = 0. Ignore channel-length modulation in the following bias calculations, except for
calculating resistances in (f)-(j). You are allowed to make reasonable approximations where
appropriate, for example Ri//Rj ≈ Rj if Ri > 10* Rj.
Find the expressions and values of the following parameters:
a. VN1 and VN2.
b. VP1.
c. Bias currents 𝐼𝐷 of M9-M14 (note: they may not be all the same.)
d. Bias currents 𝐼𝐷 of M1-M6 (note: they may not be all the same.)
e. Bias (DC) voltage at VS
f. Resistances: 𝑅𝐷4 .
g. Tail resistance: 𝑅𝑆𝑆 .
h. Output resistances: 𝑅𝑜 .
i. The minimum common-mode input voltage 𝑉𝐶𝑀,𝑚𝑖𝑛 . (Hint: to keep M11 and M12 in
saturation.)
3. [45 pts] Small-signal gain calculation
Do not ignore channel length modulation in the following questions.
Find the expressions and values of the following parameters.
a. The small-signal voltage gain Av2 = vo/vo1.
b. Draw the half-circuit model of the first stage in common mode from v2=v1=vcm to vo1.
c. Output resistances: 𝑅𝑜1,𝑐𝑚 in common mode.
d. The small-signal common-mode voltage gain Av1,cm = vo1/vcm.
e. Draw the half-circuit model of the first stage gain in differential mode from v2-v1 to vo1.
f. Output resistances: 𝑅𝑜1,𝑑𝑚 in differential mode.
g. The small-signal differential-mode voltage gain Av1,d = vo1/vd.
h. The overall common-mode voltage gain Av,cm = vo/vcm.
i. The overall differential-mode voltage gain Av,d = vo/vd.
4. Bonus questions 1 [15 pts]
a. The maximum common-mode input voltage 𝑉𝐶𝑀,𝑚𝑎𝑥 to ideally keep all first-stage
transistors in saturation. (“ideally” because we ignore channel length modulation and
possible practical mismatches or process variations in this question).
b. Find the maximum output voltage swing 𝑉𝑜,𝑚𝑎𝑥 (that all transistors are still in
saturation).
c. Adding resistors R3, R4, R5 to the sources of transistors M3, M4, M5 as shown in the
circuit is a method to improve current mirrors often used in discrete circuit and old
technology nodes many years ago. Guess why, briefly?
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