COMPUTER SYSTEM
Week 4
INSTRUCTION SET – Part 2
03/26/24 Copyrights 2017 CE-UIT. All Rights Reserved. 1
Week 4 – Instruction Set – Part 2
How to present instructions into machine code in MIPS
architecture
Reference book:
Computer Organization and Design: The Hardware/Software Interface,
Patterson, D. A., and J. L. Hennessy, Morgan Kaufman, Revised Fourth
Edition, 2011.
Copyrights 2017 CE-UIT. All Rights Reserved.
Week 4 – Instruction Set – Part 2
Instruction Formats
Arithmetic Instructions
Load/Store Instructions
Logical Instructions
Conditional Branch Instructions
Unconditional Branch Instructions
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Representing Instructions
Instructions are encoded in binary
Called machine code
MIPS instructions
Encoded as 32-bit instruction words
Small number of formats encoding operation code (opcode),
register numbers, …
Regularity!
Register numbers
$t0 – $t7 are reg’s 8 – 15
$t8 – $t9 are reg’s 24 – 25
$s0 – $s7 are reg’s 16 – 23
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MIPS R-format Instructions
op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits
Instruction fields
op: operation code (opcode)
rs: first source register number
rt: second source register number
rd: destination register number
shamt: shift amount (00000 for now)
funct: function code (extends opcode)
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MIPS I-format Instructions
op rs rt constant or address
6 bits 5 bits 5 bits 16 bits
Immediate arithmetic and load/store instructions
op: operation code (opcode)
rs: first source register number
rt: destination or second source register number
Constant: –215 to +215 – 1
Address: offset added to base address in rs
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MIPS J-format Instructions
op address
6 bits 26 bits
Jump instructions
op: operation code (opcode)
address: jump to target address
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Week 4 – Instruction Set – Part 2
Instruction Formats
Arithmetic Instructions
Load/Store Instructions
Logical Instructions
Conditional Branch Instructions
Unconditional Branch Instructions
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Arithmetic Instructions - R format
op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits
add $t0, $s1, $s2 #R[rd] = R[rs] + R[rt]
special $s1 $s2 $t0 0 add
0 17 18 8 0 32
000000 10001 10010 01000 00000 100000
00000010001100100100000000100000 2 = 0232402016
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Arithmetic Instructions – I format
op rs rt constant or address
6 bits 5 bits 5 bits 16 bits
addi $t0, $s1, #7 #R[rt] = R[rs] + SignExtImm
8hex $s1 $t0 7
8hex 17 8 7
001000 10001 01000 0000000000000111
001000100010100000000000000001112 = 2228000716
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Week 4 – Instruction Set – Part 2
Instruction Formats
Arithmetic Instructions
Load/Store Instructions
Logical Instructions
Conditional Branch Instructions
Unconditional Branch Instructions
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Load/Store Instruction – I format
op rs rt constant or address
6 bits 5 bits 5 bits 16 bits
lw $t0, 8($s1) #R[rt] = M[R[rs]+SignExtImm]
23hex $s1 $t0 8
23hex 17 8 8
100011 10001 01000 0000000000001000
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Load/Store Instruction – I format
op rs rt constant or address
6 bits 5 bits 5 bits 16 bits
sw $t0, 8($s1) #M[R[rs]+SignExtImm] = R[rt]
2bhex $s1 $t0 8
2bhex 17 8 8
101011 10001 01000 0000000000001000
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Week 4 – Instruction Set – Part 2
Instruction Formats
Arithmetic Instructions
Load/Store Instructions
Logical Instructions
Conditional Branch Instructions
Unconditional Branch Instructions
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Logical Instructions
Instructions for bitwise manipulation
Operation C Java MIPS
Shift left << << sll
Shift right >> >>> srl
Bitwise AND & & and, andi
Bitwise OR | | or, ori
Bitwise NOT ~ ~ nor
Useful for extracting and inserting groups of bits in a
word
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Shift Operations – R format
op rs rt rd shamt funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits
shamt: how many positions to shift
Shift left logical
Shift left and fill with 0 bits
sll by i bits multiplies by 2i
Shift right logical
Shift right and fill with 0 bits
srl by i bits divides by 2i (unsigned only)
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AND Operations – R format
Useful to mask bits in a word
Select some bits, clear others to 0
and $t0, $t1, $t2
$t2 0000 0000 0000 0000 0000 1101 1100 0000
$t1 0000 0000 0000 0000 0011 1100 0000 0000
$t0 0000 0000 0000 0000 0000 1100 0000 0000
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OR Operations – R format
Useful to include bits in a word
Set some bits to 1, leave others unchanged
or $t0, $t1, $t2
$t2 0000 0000 0000 0000 0000 1101 1100 0000
$t1 0000 0000 0000 0000 0011 1100 0000 0000
$t0 0000 0000 0000 0000 0011 1101 1100 0000
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NOT Operations – R format
Useful to invert bits in a word
Change 0 to 1, and 1 to 0
MIPS has NOR 3-operand instruction
a NOR b == NOT ( a OR b )
nor $t0, $t1, $zero Register 0: always
read as zero
$t1 0000 0000 0000 0000 0011 1100 0000 0000
$t0 1111 1111 1111 1111 1100 0011 1111 1111
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Week 4 – Instruction Set – Part 2
Instruction Formats
Arithmetic Instructions
Load/Store Instructions
Logical Instructions
Conditional Branch Instructions
Unconditional Branch Instructions
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Conditional Branch Instructions – I format
branch on equal beq $s1, $s2, 25 if ($s1 == $s2) goto PC + 4 + 100
branch on not equal bne $s1, $s2, 25 if ($s1 != $s2) goto PC + 4 + 100
set on less than slt $s1, $s2, $s3 if ($s2 < $s3) $s1 = 1; else $s1 = 0
Conditional set on less than sltu $s1, $s2, $s3 if ($s2 < $s3) $s1 = 1; else $s1 = 0
branch unsigned
set on less than slti $s1, $s2, 20 if ($s2 < 20) $s1 = 1; else $s1 = 0
immediate
set on less than sltiu $s1, $s2, 20 if ($s2 < 20) $s1 = 1; else $s1 = 0
immediate unsigned
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Conditional Branch Pseudo Instructions
branch on less than blt
branch greater than bgt
Conditional
branch branch less than or equal ble
(pseudo
instruction) bge
branch greater than or equal
bge slt beq
blt slt bne
slt $t0,$s0,$s1 # $t0 = 1 if $s0 <$s1
beq $t0,$zero,skip # if $s0 >= $s1, goto skip
<stuff> # do if $s0 < $s1
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Compiling If Statements
C code:
if (i==j) f = g+h;
else f = g-h;
f, g, … in $s0, $s1, …
Compiled MIPS code:
bne $s3, $s4, Else
add $s0, $s1, $s2
j Exit
Else: sub $s0, $s1, $s2
Exit: …
Assembler calculates addresses
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Compiling Loop Statements
C code:
while (save[i] == k) i += 1;
i in $s3, k in $s5, address of save in $s6
Compiled MIPS code:
Loop: sll $t1, $s3, 2
add $t1, $t1, $s6
lw $t0, 0($t1)
bne $t0, $s5, Exit
addi $s3, $s3, 1
j Loop
Exit: …
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Week 4 – Instruction Set – Part 2
Instruction Formats
Arithmetic Instructions
Load/Store Instructions
Logical Instructions
Conditional Branch Instructions
Unconditional Branch Instructions
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Unconditional Branch Instructions
jump j 2500 go to 10000 PC = 10000
jump
Uncondit jr $ra go to $ra PC = $ra
register
ional
jump $ra = PC + 4,
jump $ra = PC + 4,
jal 2500 PC = 10000
and link go to 10000
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Unconditional Branch Instructions – J format
op address
6 bits 26 bits
j 2500 #go to 10000
2hex 2500
jal 2500 #$ra = PC + 4, go to 100000
3hex 2500
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Unconditional Branch Instructions
C code
while (save[i] == k) # Find k in array save
i += 1;
Variables i, k are stored in registers $s3 và $s5; based address of array save is stored in
register $s6.
MIPS code
Loop: sll $t1,$s3,2 # Temp reg $t1 = 4 * i
add $t1,$t1,$s6 # $t1 = address of save[i]
lw $t0,0($t1) # Temp reg $t0 = save[i]
bne $t0,$s5, Exit # go to Exit if save[i] != k
addi $s3,$s3,1 #i=i+1
j Loop # go to Loop
Exit:
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Unconditional Branch Instructions
Assume Loop at location 80000
Loop: sll $t1, $s3, 2 80000 0 0 19 9 4 0
add $t1, $t1, $s6 80004 0 9 22 9 0 32
lw $t0, 0($t1) 80008 35 9 8 0
bne $t0, $s5, Exit 80012 5 8 21 2
addi $s3, $s3, 1 80016 8 19 19 1
j Loop 80020 2 20000
Exit: … 80024
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Summary
How to present MIPS instructions to machine code
Instruction formats: R format, I format, J format
Arithmetic instructions
Load/Store instructions
Logic instructions
Conditional branch instructions
Unconditional branch instructions
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Reference and Exercises
Reference
Section: 2.5, 2.6, 2.7
Book: Computer Organization and Design: The
Hardware/Software Interface, Patterson, D. A., and J. L.
Hennessy, Morgan Kaufman, Revised Fourth Edition, 2011.
Exercise: attached file
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