LLVM 22.0.0git
llvm::GCNTargetMachine Class Referencefinal

#include "Target/AMDGPU/AMDGPUTargetMachine.h"

Inheritance diagram for llvm::GCNTargetMachine:
[legend]

Public Member Functions

 GCNTargetMachine (const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)
TargetPassConfigcreatePassConfig (PassManagerBase &PM) override
 Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of CodeGen passes.
const TargetSubtargetInfogetSubtargetImpl (const Function &) const override
 Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInfo-derived member variable.
TargetTransformInfo getTargetTransformInfo (const Function &F) const override
 Get a TargetTransformInfo implementation for the target.
bool useIPRA () const override
 True if the target wants to use interprocedural register allocation by default.
Error buildCodeGenPipeline (ModulePassManager &MPM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileType, const CGPassBuilderOption &Opts, PassInstrumentationCallbacks *PIC) override
void registerMachineRegisterInfoCallback (MachineFunction &MF) const override
MachineFunctionInfocreateMachineFunctionInfo (BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
 Create the target's instance of MachineFunctionInfo.
yaml::MachineFunctionInfocreateDefaultFuncInfoYAML () const override
 Allocate and return a default initialized instance of the YAML representation for the MachineFunctionInfo.
yaml::MachineFunctionInfoconvertFuncInfoToYAML (const MachineFunction &MF) const override
 Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.
bool parseMachineFunctionInfo (const yaml::MachineFunctionInfo &, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange) const override
 Parse out the target's MachineFunctionInfo from the YAML reprsentation.
ScheduleDAGInstrscreateMachineScheduler (MachineSchedContext *C) const override
 Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this function and target at the current optimization level.
ScheduleDAGInstrscreatePostMachineScheduler (MachineSchedContext *C) const override
 Similar to createMachineScheduler but used when postRA machine scheduling is enabled.
Public Member Functions inherited from llvm::AMDGPUTargetMachine
 AMDGPUTargetMachine (const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL)
 ~AMDGPUTargetMachine () override
const TargetSubtargetInfogetSubtargetImpl () const
TargetLoweringObjectFilegetObjFileLowering () const override
void registerPassBuilderCallbacks (PassBuilder &PB) override
 Allow the target to modify the pass pipeline.
void registerDefaultAliasAnalyses (AAManager &) override
 Allow the target to register alias analyses with the AAManager for use with the new pass manager.
bool isNoopAddrSpaceCast (unsigned SrcAS, unsigned DestAS) const override
 Returns true if a cast between SrcAS and DestAS is a noop.
unsigned getAssumedAddrSpace (const Value *V) const override
 If the specified generic pointer could be assumed as a pointer to a specific address space, return that address space.
std::pair< const Value *, unsignedgetPredicatedAddrSpace (const Value *V) const override
 If the specified predicate checks whether a generic pointer falls within a specified address space, return that generic pointer and the address space being queried.
unsigned getAddressSpaceForPseudoSourceKind (unsigned Kind) const override
 getAddressSpaceForPseudoSourceKind - Given the kind of memory (e.g.
bool splitModule (Module &M, unsigned NumParts, function_ref< void(std::unique_ptr< Module > MPart)> ModuleCallback) override
 Entry point for module splitting.
Public Member Functions inherited from llvm::CodeGenTargetMachineImpl
bool addPassesToEmitFile (PassManagerBase &PM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileType, bool DisableVerify=true, MachineModuleInfoWrapperPass *MMIWP=nullptr) override
 Add passes to the specified pass manager to get the specified file emitted.
bool addPassesToEmitMC (PassManagerBase &PM, MCContext *&Ctx, raw_pwrite_stream &Out, bool DisableVerify=true) override
 Add passes to the specified pass manager to get machine code emitted with the MCJIT.
bool addAsmPrinter (PassManagerBase &PM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileType, MCContext &Context) override
 Adds an AsmPrinter pass to the pipeline that prints assembly or machine code from the MI representation.
Expected< std::unique_ptr< MCStreamer > > createMCStreamer (raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileType, MCContext &Ctx) override
Public Member Functions inherited from llvm::TargetMachine
 TargetMachine (const TargetMachine &)=delete
void operator= (const TargetMachine &)=delete
virtual ~TargetMachine ()
const TargetgetTarget () const
const TriplegetTargetTriple () const
StringRef getTargetCPU () const
StringRef getTargetFeatureString () const
void setTargetFeatureString (StringRef FS)
template<typename STC>
const STC & getSubtarget (const Function &F) const
 This method returns a pointer to the specified type of TargetSubtargetInfo.
const DataLayout createDataLayout () const
 Create a DataLayout.
bool isCompatibleDataLayout (const DataLayout &Candidate) const
 Test if a DataLayout if compatible with the CodeGen for this target.
unsigned getPointerSize (unsigned AS) const
 Get the pointer size for this target.
unsigned getPointerSizeInBits (unsigned AS) const
unsigned getProgramPointerSize () const
unsigned getAllocaPointerSize () const
void resetTargetOptions (const Function &F) const
 Reset the target options based on the function's attributes.
const MCAsmInfogetMCAsmInfo () const
 Return target specific asm information.
const MCRegisterInfogetMCRegisterInfo () const
const MCInstrInfogetMCInstrInfo () const
const MCSubtargetInfogetMCSubtargetInfo () const
ExceptionHandling getExceptionModel () const
 Return the ExceptionHandling to use, considering TargetOptions and the Triple's default.
bool requiresStructuredCFG () const
void setRequiresStructuredCFG (bool Value)
Reloc::Model getRelocationModel () const
 Returns the code generation relocation model.
CodeModel::Model getCodeModel () const
 Returns the code model.
uint64_t getMaxCodeSize () const
 Returns the maximum code size possible under the code model.
void setCodeModel (CodeModel::Model CM)
 Set the code model.
void setLargeDataThreshold (uint64_t LDT)
bool isLargeGlobalValue (const GlobalValue *GV) const
bool isPositionIndependent () const
bool shouldAssumeDSOLocal (const GlobalValue *GV) const
bool useEmulatedTLS () const
 Returns true if this target uses emulated TLS.
bool useTLSDESC () const
 Returns true if this target uses TLS Descriptors.
TLSModel::Model getTLSModel (const GlobalValue *GV) const
 Returns the TLS model which should be used for the given global variable.
CodeGenOptLevel getOptLevel () const
 Returns the optimization level: None, Less, Default, or Aggressive.
void setOptLevel (CodeGenOptLevel Level)
 Overrides the optimization level.
void setFastISel (bool Enable)
bool getO0WantsFastISel ()
void setO0WantsFastISel (bool Enable)
void setGlobalISel (bool Enable)
void setGlobalISelAbort (GlobalISelAbortMode Mode)
void setMachineOutliner (bool Enable)
void setSupportsDefaultOutlining (bool Enable)
void setSupportsDebugEntryValues (bool Enable)
void setCFIFixup (bool Enable)
bool getAIXExtendedAltivecABI () const
bool getUniqueSectionNames () const
bool getUniqueBasicBlockSectionNames () const
 Return true if unique basic block section names must be generated.
bool getSeparateNamedSections () const
bool getDataSections () const
 Return true if data objects should be emitted into their own section, corresponds to -fdata-sections.
bool getFunctionSections () const
 Return true if functions should be emitted into their own section, corresponding to -ffunction-sections.
bool getEnableStaticDataPartitioning () const
bool getIgnoreXCOFFVisibility () const
 Return true if visibility attribute should not be emitted in XCOFF, corresponding to -mignore-xcoff-visibility.
bool getXCOFFTracebackTable () const
 Return true if XCOFF traceback table should be emitted, corresponding to -xcoff-traceback-table.
llvm::BasicBlockSection getBBSectionsType () const
 If basic blocks should be emitted into their own section, corresponding to -fbasic-block-sections.
const MemoryBuffergetBBSectionsFuncListBuf () const
 Get the list of functions and basic block ids that need unique sections.
void setPGOOption (std::optional< PGOOptions > PGOOpt)
const std::optional< PGOOptions > & getPGOOption () const
TargetIRAnalysis getTargetIRAnalysis () const
 Get a TargetIRAnalysis appropriate for the target.
virtual void registerEarlyDefaultAliasAnalyses (AAManager &)
 Allow the target to register early alias analyses (AA before BasicAA) with the AAManager for use with the new pass manager.
virtual bool targetSchedulesPostRAScheduling () const
 True if subtarget inserts the final scheduling pass on its own.
void getNameWithPrefix (SmallVectorImpl< char > &Name, const GlobalValue *GV, Mangler &Mang, bool MayAlwaysUsePrivate=false) const
MCSymbolgetSymbol (const GlobalValue *GV) const
virtual unsigned getSjLjDataSize () const
virtual bool isMachineVerifierClean () const
 Returns true if the target is expected to pass all machine verifier checks.
virtual bool usesPhysRegsForValues () const
 True if the target uses physical regs (as nearly all targets do).
virtual int unqualifiedInlineAsmVariant () const
 The default variant to use in unqualified asm instructions.
virtual size_t clearLinkerOptimizationHints (const SmallPtrSetImpl< MachineInstr * > &MIs) const
 Remove all Linker Optimization Hints (LOH) associated with instructions in MIs and.

Additional Inherited Members

Static Public Member Functions inherited from llvm::AMDGPUTargetMachine
static int64_t getNullPointerValue (unsigned AddrSpace)
 Get the integer value of a null pointer in the given address space.
Static Public Member Functions inherited from llvm::TargetMachine
static std::pair< int, int > parseBinutilsVersion (StringRef Version)
Public Attributes inherited from llvm::TargetMachine
TargetOptions Options
Static Public Attributes inherited from llvm::AMDGPUTargetMachine
static bool EnableFunctionCalls = false
static bool EnableLowerModuleLDS = true
Static Public Attributes inherited from llvm::TargetMachine
static constexpr unsigned DefaultSjLjDataSize = 32
 The integer bit size to use for SjLj based exception handling.
Protected Member Functions inherited from llvm::AMDGPUTargetMachine
StringRef getGPUName (const Function &F) const
StringRef getFeatureString (const Function &F) const
Protected Member Functions inherited from llvm::CodeGenTargetMachineImpl
 CodeGenTargetMachineImpl (const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOptLevel OL)
void initAsmInfo ()
virtual void reset ()
 Reset internal state.
Protected Member Functions inherited from llvm::TargetMachine
 TargetMachine (const Target &T, StringRef DataLayoutString, const Triple &TargetTriple, StringRef CPU, StringRef FS, const TargetOptions &Options)
Protected Attributes inherited from llvm::AMDGPUTargetMachine
std::unique_ptr< TargetLoweringObjectFileTLOF
Protected Attributes inherited from llvm::TargetMachine
const TargetTheTarget
 The Target that this machine was created for.
const DataLayout DL
 DataLayout for the target: keep ABI type size and alignment.
Triple TargetTriple
 Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
std::string TargetCPU
std::string TargetFS
Reloc::Model RM = Reloc::Static
CodeModel::Model CMModel = CodeModel::Small
uint64_t LargeDataThreshold = 0
CodeGenOptLevel OptLevel = CodeGenOptLevel::Default
std::unique_ptr< const MCAsmInfoAsmInfo
 Contains target specific asm information.
std::unique_ptr< const MCRegisterInfoMRI
std::unique_ptr< const MCInstrInfoMII
std::unique_ptr< const MCSubtargetInfoSTI
unsigned RequireStructuredCFG: 1
unsigned O0WantsFastISel: 1
std::optional< PGOOptionsPGOOption

Detailed Description

Definition at line 81 of file AMDGPUTargetMachine.h.

Constructor & Destructor Documentation

◆ GCNTargetMachine()

GCNTargetMachine::GCNTargetMachine ( const Target & T,
const Triple & TT,
StringRef CPU,
StringRef FS,
const TargetOptions & Options,
std::optional< Reloc::Model > RM,
std::optional< CodeModel::Model > CM,
CodeGenOptLevel OL,
bool JIT )

Member Function Documentation

◆ buildCodeGenPipeline()

Error GCNTargetMachine::buildCodeGenPipeline ( ModulePassManager & MPM,
raw_pwrite_stream & Out,
raw_pwrite_stream * DwoOut,
CodeGenFileType FileType,
const CGPassBuilderOption & Opts,
PassInstrumentationCallbacks * PIC )
overridevirtual

Reimplemented from llvm::TargetMachine.

Definition at line 1137 of file AMDGPUTargetMachine.cpp.

References PIC.

◆ convertFuncInfoToYAML()

yaml::MachineFunctionInfo * GCNTargetMachine::convertFuncInfoToYAML ( const MachineFunction & MF) const
overridevirtual

Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.

Reimplemented from llvm::TargetMachine.

Definition at line 1821 of file AMDGPUTargetMachine.cpp.

References llvm::MachineFunction::getInfo(), llvm::GCNSubtarget::getRegisterInfo(), and llvm::MachineFunction::getSubtarget().

◆ createDefaultFuncInfoYAML()

yaml::MachineFunctionInfo * GCNTargetMachine::createDefaultFuncInfoYAML ( ) const
overridevirtual

Allocate and return a default initialized instance of the YAML representation for the MachineFunctionInfo.

Reimplemented from llvm::TargetMachine.

Definition at line 1816 of file AMDGPUTargetMachine.cpp.

◆ createMachineFunctionInfo()

MachineFunctionInfo * GCNTargetMachine::createMachineFunctionInfo ( BumpPtrAllocator & Allocator,
const Function & F,
const TargetSubtargetInfo * STI ) const
overridevirtual

Create the target's instance of MachineFunctionInfo.

Reimplemented from llvm::TargetMachine.

Definition at line 1809 of file AMDGPUTargetMachine.cpp.

References llvm::MachineFunctionInfo::create(), F, and llvm::TargetMachine::STI.

◆ createMachineScheduler()

ScheduleDAGInstrs * GCNTargetMachine::createMachineScheduler ( MachineSchedContext * C) const
overridevirtual

Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this function and target at the current optimization level.

This can also be used to plug a new MachineSchedStrategy into an instance of the standard ScheduleDAGMI: return new ScheduleDAGMI(C, std::make_unique<MyStrategy>(C), /*RemoveKillFlags=*‍/false)

Return NULL to select the default (generic) machine scheduler.

Reimplemented from llvm::AMDGPUTargetMachine.

Definition at line 1146 of file AMDGPUTargetMachine.cpp.

References AMDGPUSchedStrategy, llvm::CallingConv::C, createGCNMaxILPMachineScheduler(), createGCNMaxMemoryClauseMachineScheduler(), createGCNMaxOccupancyMachineScheduler(), createIterativeGCNMaxOccupancyMachineScheduler(), createIterativeILPMachineScheduler(), createMinRegScheduler(), createSIMachineScheduler(), llvm::Attribute::getValueAsString(), and llvm::Attribute::isValid().

◆ createPassConfig()

TargetPassConfig * GCNTargetMachine::createPassConfig ( PassManagerBase & PM)
overridevirtual

Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of CodeGen passes.

createPassConfig - Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of CodeGen passes.

Targets may override this to extend TargetPassConfig.

Reimplemented from llvm::CodeGenTargetMachineImpl.

Definition at line 1799 of file AMDGPUTargetMachine.cpp.

◆ createPostMachineScheduler()

◆ getSubtargetImpl()

const TargetSubtargetInfo * GCNTargetMachine::getSubtargetImpl ( const Function & ) const
overridevirtual

Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInfo-derived member variable.

Implements llvm::AMDGPUTargetMachine.

Definition at line 1111 of file AMDGPUTargetMachine.cpp.

References llvm::SmallString< InternalLen >::append(), F, llvm::AMDGPUTargetMachine::getFeatureString(), llvm::AMDGPUTargetMachine::getGPUName(), I, llvm::TargetMachine::resetTargetOptions(), ScalarizeGlobal, and llvm::TargetMachine::TargetTriple.

◆ getTargetTransformInfo()

TargetTransformInfo GCNTargetMachine::getTargetTransformInfo ( const Function & F) const
overridevirtual

Get a TargetTransformInfo implementation for the target.

The TTI returned uses the common code generator to answer queries about the IR.

Reimplemented from llvm::CodeGenTargetMachineImpl.

Definition at line 1133 of file AMDGPUTargetMachine.cpp.

References F.

◆ parseMachineFunctionInfo()

bool GCNTargetMachine::parseMachineFunctionInfo ( const yaml::MachineFunctionInfo & ,
PerFunctionMIParsingState & PFS,
SMDiagnostic & Error,
SMRange & SourceRange ) const
overridevirtual

Parse out the target's MachineFunctionInfo from the YAML reprsentation.

Reimplemented from llvm::TargetMachine.

Definition at line 1827 of file AMDGPUTargetMachine.cpp.

References _, A(), llvm::yaml::SIMachineFunctionInfo::ArgInfo, llvm::ArgDescriptor::createArg(), llvm::ArgDescriptor::createRegister(), llvm::ArgDescriptor::createStack(), llvm::AMDGPUFunctionArgInfo::DispatchID, llvm::AMDGPUFunctionArgInfo::DispatchPtr, llvm::SourceMgr::DK_Error, llvm::SIModeRegisterDefaults::DX10Clamp, llvm::yaml::SIMode::DX10Clamp, llvm::AMDGPUFunctionArgInfo::FlatScratchInit, llvm::SIModeRegisterDefaults::FP32Denormals, llvm::yaml::SIMode::FP32InputDenormals, llvm::yaml::SIMode::FP32OutputDenormals, llvm::SIModeRegisterDefaults::FP64FP16Denormals, llvm::yaml::SIMode::FP64FP16InputDenormals, llvm::yaml::SIMode::FP64FP16OutputDenormals, llvm::yaml::SIMachineFunctionInfo::FrameOffsetReg, llvm::MemoryBuffer::getBufferIdentifier(), llvm::MachineFunction::getInfo(), llvm::SourceMgr::getMainFileID(), llvm::SourceMgr::getMemoryBuffer(), llvm::MachineFunction::getSubtarget(), llvm::yaml::SIMachineFunctionInfo::HasInitWholeWave, llvm::DenormalMode::IEEE, llvm::SIModeRegisterDefaults::IEEE, llvm::yaml::SIMode::IEEE, llvm::AMDGPUFunctionArgInfo::ImplicitArgPtr, llvm::AMDGPUFunctionArgInfo::ImplicitBufferPtr, llvm::SIMachineFunctionInfo::initializeBaseYamlFields(), llvm::DenormalMode::Input, llvm::AMDGPUFunctionArgInfo::KernargSegmentPtr, llvm::AMDGPUFunctionArgInfo::LDSKernelId, llvm::yaml::SIMachineFunctionInfo::LongBranchReservedReg, llvm::PerFunctionMIParsingState::MF, llvm::yaml::SIMachineFunctionInfo::Mode, llvm::DenormalMode::Output, llvm::parseNamedRegisterReference(), llvm::DenormalMode::PreserveSign, llvm::AMDGPUFunctionArgInfo::PrivateSegmentBuffer, llvm::AMDGPUFunctionArgInfo::PrivateSegmentSize, llvm::AMDGPUFunctionArgInfo::PrivateSegmentWaveByteOffset, llvm::AMDGPUFunctionArgInfo::QueuePtr, RegName, llvm::SIMachineFunctionInfo::reserveWWMRegister(), llvm::yaml::SIMachineFunctionInfo::ScratchRSrcReg, llvm::SIMachineFunctionInfo::setFlag(), llvm::AMDGPUMachineFunction::setInitWholeWave(), llvm::yaml::SIMachineFunctionInfo::SGPRForEXECCopy, llvm::PerFunctionMIParsingState::SM, llvm::yaml::SIMachineFunctionInfo::SpillPhysVGPRS, llvm::yaml::SIMachineFunctionInfo::StackPtrOffsetReg, llvm::yaml::SIMachineFunctionInfo::VGPRForAGPRCopy, llvm::PerFunctionMIParsingState::VRegInfos, llvm::PerFunctionMIParsingState::VRegInfosNamed, llvm::AMDGPUFunctionArgInfo::WorkGroupIDX, llvm::AMDGPUFunctionArgInfo::WorkGroupIDY, llvm::AMDGPUFunctionArgInfo::WorkGroupIDZ, llvm::AMDGPUFunctionArgInfo::WorkGroupInfo, llvm::AMDGPUFunctionArgInfo::WorkItemIDX, llvm::AMDGPUFunctionArgInfo::WorkItemIDY, llvm::AMDGPUFunctionArgInfo::WorkItemIDZ, and llvm::yaml::SIMachineFunctionInfo::WWMReservedRegs.

◆ registerMachineRegisterInfoCallback()

void GCNTargetMachine::registerMachineRegisterInfoCallback ( MachineFunction & MF) const
overridevirtual

◆ useIPRA()

bool llvm::GCNTargetMachine::useIPRA ( ) const
inlineoverridevirtual

True if the target wants to use interprocedural register allocation by default.

The -enable-ipra flag can be used to override this.

Reimplemented from llvm::TargetMachine.

Definition at line 98 of file AMDGPUTargetMachine.h.


The documentation for this class was generated from the following files: