ECE 321/ELE302

Electronics II
Course Outline
 Review of BJT Amplifiers
 Review of JFET Amplifiers
 Review of Cascaded Amplifier Systems
 Cascaded BJT and JFET Amplifiers
 Frequency Response
 Differential Amplifier
 Operational Amplifier and Circuits
 Analog Filter Systems
 Tone Control and Equalizer
 Power Supply and Regulator Circuits
 Classes of Amplifiers
 Power Calculation
 Positive Feedback Circuits
Grading System
 Preliminary Examination
 Final Examination
 3 Written Quizzes
 4th Quiz: Oral Report and Group Written Report
 Audio Component Design Project
 Project Integration (plus points)
Formula:
Q1 + Q2 + 2PE +Q3 + Q4 + 2FE + Project
References
 Electronic Devices and Circuit Theory
 By: Boylestad and Nashelsky
 Operational Amplifiers
 By: Coughlin and Driscol
Review of BJT Amplifiers
 Bipolar Junction Transistor (BJT)
The Two Types of BJT Transistors

npn pnp

E n p n C E p n p C

Cross Section Cross Section

B B
C C

B B
Schematic Schematic
Symbol Symbol
E E
BJT Equations

IE IC IE IC
- VCE + + VEC -
E C E C
- -
+ +
VBE IB VBC VEB VCB
IB
+ + - -
B B

npn pnp
I E = I B + IC IE = IB + IC
VCE = -VBC + VBE VEC = VEB - VCB
DC  and DC 
 = Common-emitter current gain
 = Common-base current gain
 = IC  = IC
IB IE

The relationships between the two parameters are:

=  = 
+1 1-
 Common Emitter
VCE Collector-Current Curves
IC
IC

+ Active
VCC _ IB
Region

IB
Region of Description
Operation

Active Small base current controls a VCE

large collector current
Saturation Region
Cutoff Region
Saturation VCE(sat) ~ 0.2V, VCE increases
IB = 0
with IC

Cutoff Achieved by reducing IB to 0,

Ideally, IC will also equal 0.
Small Signal Analysis
Ex. Common Emitter Amplifier

Find re, Zi, Zo,

Av, Ai.
Assignment (optional):
1. Compare the different BJT Configurations
Common
Characteristic Common Base Common Emitter
Collector
Power Gain

Voltage Gain

Current Gain

Input Impedance

Output
Impedance

Phase Inversion

Application
Assignment (optional):
1. Compare the different BJT Configurations
Common
Characteristic Common Base Common Emitter
Collector
Power Gain moderate highest moderate
Voltage Gain highest moderate less than 1
Current Gain lowest than1 moderate highest

Input Impedance lowest moderate highest

Output
Impedance
highest moderate lowest
180o out of
Phase Inversion none none
phase
Application RF amplifier universal isolation
2. Enumerate and describe the different types of
BJT biasing.

Write in 1 long bond paper.

Handwritten.
Submit next meeting.
Transistor Biasing
 Bias

 Is a DC voltage or current that sets the

operating point for amplifying the AC signal
Amplifier Biasing

1. The base–emitter junction must be forward-

biased, with a resulting forward-bias voltage of
about 0.6 to 0.7 V.

2. The base–collector junction must be

reverse-biased, with the reverse-bias voltage
being any value within the maximum limits of the
device.
Cutoff-region operation:

Base–emitter junction reverse biased

Saturation-region operation:

Base–emitter junction forward biased

Base–collector junction forward biased
Transistor Biasing
Fixed Bias
 taken from a battery or power supply

VCC
RC
RB
Vo
Vi
C
C
Transistor Biasing
Self Bias

 The amplifier produces its own DC voltage from an IR

drop across a resistor in the return circuit of the
common terminal.

 Most often used due to its economical and stabilizing

effect on the DC level of the output current.

 Can be emitter stabilized or collector stabilized.

Transistor Biasing
Self Bias
VCC
RC
RB
Vo
Vi
C
C

RE
Emitter
Stabilized
Stability

 Emitter resistor to the provides improved

stability, that is, the dc bias currents and
voltages remain closer to where they
were set by the circuit when outside
conditions, such as temperature, and
transistor beta, change.
Transistor Biasing
Self Bias
VCC
RC
RB

Vo
Vi
C
C

Collector
Stabilized
Transistor Biasing
Voltage-Divider Bias
 The most stable type of circuit biasing.
VCC
RC
RL
Vo
Vi
C
C

R2 RE
Transistor Biasing
Signal Bias
VCC
RC

RB C Vo
C

RE
Review of JFET Amplifiers
Field Effect Transistor (FET)

 Unipolar device - operate only with

one type of charge carrier.
Voltage controlled device where the
voltage between two of the terminals
(gate and source) controls the current
through the device.
 very high input resistance.
 BJT vs JFET

Current Controlled Voltage Controlled

JFET Structure and Symbol
drain drain

n-channel

p-channel
gate p p gate n n

source source

D D
G G

S S
n-channel p-channel
JFET Operating Characteristics
There are three basic operating conditions for a JFET:
JFET’s operate in the depletion mode only
A. VGS = 0, VDS is a minimum value depending on
IDSS and the drain and source resistance
B. VGS < 0, VDS at some positive value and
C. Device is operating as a Voltage-Controlled
Resistor

For an n channel JFET, VGS may never be positive

For an p channel JFET, VGS may never be negative
N-channel JFET Operation
JFET Saturation

At the pinch-off point:

• any further increase in VGS does not produce any increase in ID. VGS at
pinch-off is denoted as Vp.
• ID is at saturation or maximum is referred to as IDSS.
• The ohmic value of the channel is at maximum.
Q point

IDSS/2

IDSS/4

0.5VGS(off)
0.3VGS(off)
JFET fixed-bias configuration.
Substituting the JFET AC equivalent circuit unit

Zi  FET   R G
Determining Zo.

Set Vi  0

Zo  FET  = rd || R D
if rd  10R D
Determining Zo.

Set Vi  0

Zo  FET  = R D
if rd  10R D
Determining Av

A v =  Vo Vi  = -gm  rd || R D 
A v =  Vo Vi  = -gm  R D  when rd  10R D
Determining Av

Vo = -g m Vgs  rd || R D 
Vgs = Vi
Vo = -g m Vi  rd || R D 
Example

Determine the
following for the network

IDSS=10mA 1. gm and rd
VP=-8V 2. Zi
3. Zo
4. A V
5. A V ignoring effect of rd

IDQ=5.625mA
VGSQ=-2V
yOS=40S
Solutions

IDQ=5.625mA
VGSQ=-2V
IDSS=10mA 2I DSS 2 10mA 
gm0 = = = 2.5mS
VP=-8V VP 8V

1 1
rd = = = 25 k
y os 40S

Zi = RG = 1MΩ
yOS=40S
Zo = rd || R D = 2k || 25k = 1.85k
Solutions..

Zo = rd || R D = 2k || 25k = 1.85k

Vo
AV = = -gm  R D || rd 
Vi
With rd , A v = -3.48

Vo
AV = = -g m R D
Vi
Without rd , A v = -3.76
Self-Bias JFET configuration.

JFET AC equivalent circuit.

Redrawn Network

Zi = ?
Zo = ?
AV = ?
JFET voltage-divider configuration

Network under AC conditions

Redrawn network
Important Parameters

Z i  R1 || R2
Z o  rd || RD
AV :
Vi  Vgs
and
Vo   g mVg s ( RD || rd )
If rd l arg e,
Thus AV   g m RD
DC Biasing for JFET
1. Fixed Bias
- a separate power source.
VDD +
RL
ID
Vin
-
RG
VGS +

VGG -
DC Biasing for JFET
2. Self Bias
VDD +

RL
ID
Vin
VGS
+
RG VS RS
-
DC Biasing for JFET
3. Source Bias
VDD +

RL
ID
Vin
-
VGS +
RG RS

VSS -
DC Biasing for JFET
4. Voltage Divider VDD +

R1 RL
ID
Vin
-
VGS +
R2 RS
VS
DC Analysis

JFET Common Source amplifier DC Equivalent amp.

The DC circuit extends only to the capacitors.

Only the AC circuit extends beyond.
AC Analysis
AC Analysis
With ac equivalent circuit analysis we view the capacitors
effectively as shorts. Notice that the source is at ground
and RD and RL are in parallel. Rd = RD RL / RD + RL

Rd

Rd = L

Vgs L

=
FET Summary

 FET amplifier configuration operations are similar

to BJT amplifiers.
 The transconductance (gm) relates the drain
current (ac output) to the ac input voltage (Vgs)
 Gain can be affected by drain circuit resistance.
 The input resistance for a FET at the gate is
extremely high.
 The common-source is the most used type of
FET amplifier and has a phase inversion is 180º.
 The common-source is the most used type of
FET amplifier and has a phase inversion is 180º.

 The common-drain has no phase shift, a gain

slightly less than 1, and the output is taken from
the source.

 The common-gate has no phase shift and low

input resistance.
Review of Cascaded Amplifiers
Typical Amplifier Circuits
VCC
VCC

BJT JFET
Amplifier R1 RC
RD
Amplifier

Load
Q1 Load Q1

R2 R1
RE RS

Rf

Rin
+V Op-Amp Based
Amplifier
Load
-V
Amplifier Model Circuits
Zout

Zin A

Zin A Zout
Cascade Connection
- a series connection with the output of one stage
then applied as input to the second stage and so on.
- provides a multiplication of the gain of each stage for
a larger overall gain.
+Vcc
I1 I2 I3
Transducer R O
Vo
Vin
Load RL
Ro
Rin -Vcc or "0"
Cascade amplifiers

AV = AV1AV2AV3…AVn AV(dB) = 20Log(AV)

Cascade Amplifier

- used to obtain higher voltage

amplification, or matching of the input
impedance with the transducer and matching
the output impedances with the loading of the
following stage
 vo 2 i
Find Ro 2 , Rin1 , AvT  , Ai  L of the following BJT  BJT Cascade amplifier.
vin1 iin1

VCC=12V VCC=12V

8.2k 47k 8.2k VO

47k
Vin Iin IL
 
10k
15k 15k
RO2
0.2K Rin2 0.2K
Rin
BJT Small Signal Analysis
(a) Find re for both BJT

R1 15
VBB  VCC  12   2.9V ,
R1  R2 15  47
RB  47 / /15  11.37 k
 RB   11.37 k 
VBB  2.9  I C   RE   0.7  I C (mA)   0.2k   0.7
    100 
2.2V
I C (mA)   7.03mA
0.313k
26mV 26mV
re    3.7
IC 7.03mA
Phase Inversion
+VCC

vout

vin
4Vpp

Load
20mVpp
 vo2
Find Ro2 , Rin , AvT  of the folowing FET  FET Cascade amplifier .
vin

12V 12V
1k 1k
VO2
Vin
IDSS=8mA
1k
VP=-8V
1M 1M
1k 1k
Rin Rin2 RO2
(a) Find gm of the FET  V
2
 VGS  I D RS
ID  IDSS  1  GS 
 VP 
  2mA  1k  2V
ID
2
From graph   2 RS=1k
 8 1    4.5mA
  8
VGS  3.2V ,  V
2
 8 IDSS
ID  IDSS  1  GS 

VP
I D  3.2mA  
 4
2 6
 8 1    2mA
 VGS 
2 I DSS  8
 gm  1   4
VP  VP 

2  8  3.2  2
 1  
8  8  VGS
0
 1.2mS VP -8 -6 -4 -2
-3.2V
DC analysis

Determine: ID & VGS. ID determines Q-point.

ID will be ≈ IDSS /2 for VGS = 0.3VGS(off)

ID will be ≈ IDSS /4 for VGS = 0.5VGS(off)

Q point

IDSS/2

IDSS/4

0.5VGS(off)
0.3VGS(off)
 Plotting the Transconductance Curve

Using IDSS and VP (or VGS(off)) values found in a specification sheet, the Family of Curves
can be plotted by making a table of data using the following 3 steps:

Step 1:
2
 VGS 
Solve ID = IDSS  1 -  for VGS = 0V
 VP 

Step 2
2
Solve  VGS 
for VGS = VP ( aka VGS(off) )
ID = IDSS  1 - 
 VP 

Step 3:
2

Solve  VGS 
for 0V VGS  VP in 1V increments for VGS
ID = IDSS  1 - 
 VP 
 Transfer (Transconductance) Curve

From this graph it is easy to determine the value of ID for a given

value of VGS
It is also possible to determine IDSS and VP by looking at the knee
where VGS is 0
FET Equivalent Circuit
 (b) Find AVT of the FET-FET cascade amplifier
12V 12V
1k 1k
VO2
Vin
IDSS=8mA
VP=-8V 1k
1M 1M
1k 1k
Rin Rin2 RO2

Input resistance 1 Rin  RG  1M

Output resistance 2 Ro 2  RD  1k

vo1
Voltage gain 1 Av1    g m 1k / /1M   1.2mS 1k  1.2
vin1
vo1
Voltage gain 2 Av 2    g m 1k / /1k   1.2mS  0.5k  0.6
vin1
vo 2 vo1 vo 2
Voltage gain overall AvT     Av1  Av 2   1.2    0.6   0.72
vin1 vin1 vo1
Here is the PCB (printed circuit board) for the 2-stage FET amplifier.