Problem 1. a) Recognize the simple BJT current mirror.

For this part, it is given that

I C1 IC 2
VA = ∞ , and as a result IC1 = I C 2 . We note that I REF = I C1 + I B1 + I B 2 = I C1 + + and since
β β
⎛ 2⎞ I 2mA
IC1 = I C 2 , we have I REF = I C1 ⎜1 + ⎟ and I C 2 = REF = = 1.923mA . b) For this part, it
⎝ β⎠ 1+
2 1+0.04
β
I C 2 1 + VCE 2 VA
is given that β = ∞ , and as a result I C1 = I REF . We know that = . We know that
I C1 1 + VCE1 VA
VCE1 = VBE1 ≈ 0.7V , and we are given that VCE 2 = 8V .
1 + 8 50 1.16
I C 2 = 2mA = 2mA = 2.288mA .
1 + 0.7 50 1.014
Problem 2. a) Recognize that if λ = 0 , there is no dependence of I D on VDS . Hence,
W2 ∆VDS 1 ∆I D 1
I D 2 = I D1 × = 100 µ A × 200 µ A . b) Recall that = ro = , therefore = = λID .
W1 ∆I D λ ID ∆VDS ro
∆I D 2 ∆I D 2 µA
Because Vx = VDS 2 , = = λ I D 2 = 0.1× 200µ A = 20 . c) The drain-source voltage
∆Vx ∆VDS 2 V
of M1 is equal to the gate-source voltage of M1, which is given by:
2 I D1 200µ A
VDS 1 = VGS 1 = + V = + 0.5 = 0.894 + 0.6 = 1.4V .
µCox ( WL )1 t
50 ×10-6 ( 5 )
Problem 3. a) Note that the bias current is established through Q5. There is 5.3V across
4kΩ resulting in I C 5 = 1.325mA . Note that there is a separate mirror transistor for each side
of the differential amplifier, so I C1 = I C 2 = 1.325mA . As a result,
VC1 = 10 − 3kΩ × 1.325mA = 6.025V . b) First, note that VY will be approximately equal
to VB1 and VB 2 . Therefore, this question is really asking about the range of VB1 and VB 2 that
will keep all transistors forward active. Now consider the lower limit. The collector of Q3 must
be at least 0.2 volts above the emitter of Q3 ( −6V ). In fact, the classic definition of forward
active requires that the collector of Q3 be higher than the base of Q3, or at least 0.7 volts above
the emitter of Q3. Note that the collector of Q3 is connected to the emitter of Q1. The base of
Q1 must be at least 0.7 volts higher than the emitter of Q1. Therefore, the lowest allowable
voltage at the base of Q1 is 0.9 to 1.4 volts higher than −6V . Acceptable lower limits were
−4.6V to −5.1V . Now the upper limit of VB1 . We know that VC1 = 6.025V , so an
acceptable upper limit for VB1 is 6.025V .
 c) Behold Figure S-3. The differential amplifier is
represented by the dashed triangle. Only the input 5kΩ
resistance is important here so the outputs of the
differential amplifier are not shown. The differential
input resistance Rid is shown. By voltage division,
vX vid Rid
vid Rid
= . If this is difficult to
v X 5kΩ + Rid + 5kΩ 5kΩ
remember, think of it this way: Figure S-3
vid Resistance across which vid appears
= . This
v X Resistance across which v X appears
approach will always work if all the resistors have the same current through them. It remains to
find Rid for this circuit. Rid = 2rπ (1 + g m RE ) . In this case,
βVT 2.5 1.325mA
rπ = = = 1.89kΩ and g m = = 53 × 10−3 AV . Note also that the
IC 1.325mA 0.025
signal ground in differential mode is in the middle of the 100Ω resistor, so RE = 50Ω . These
vid 12.7kΩ
result in Rid = 12.7kΩ and = = 0.56 VV .
v X 12.7kΩ + 10kΩ
Problem 4. a) Recognize that with vx grounded, vin is the differential input voltage. The
requested gain is that of the differential amplifier with the output taken single-ended, which is
Adm
. To find the collector current of Q4, note voltage across R7 is 9.3V, so
2
9.3V
IC 4 = = 1.16mA . It follows that IC1 = IC 2 = 0.58mA and g m1 = g m 2 = 23.2 × 10−3 AV .
8kΩ
A 1
Finally, dm = × ( − g m RC ) = −23.2 VV . b) In this case, the resistance Rin is the differential
2 2
β V 100 × .025
input resistance given by Rin = 2rπ . Find rπ = T = = 4.31kΩ and hence
IC 0.58mA
Rin = 8.62kΩ . c) Recognize that when vx is connected to vin , the amplifier is driven with a
common-mode input. Hence, the appropriate gain to use is the common-mode gain, given by
− g m RC
Acm = . Because a current mirror is used for the tail current source in this case, it is
1 + 2 g m REE
− RC
quite likely that g m REE  1 , allowing the use of the approximation Acm ≈ . REE is the
2 REE
 VA 100V
output resistance of the current mirror, which is given by = = 86kΩ and
I C 1.16mA
−2kΩ v
Acm ≈ = 0.012 VV , hence out = 0.012 VV . Note that the common-mode gain does not need
172kΩ vin
to be divided by 2 when the output is taken single-ended because both collectors are at the same
voltage and the voltage at one collector is the same as the common-mode output voltage.

vd 1 Adm 1
Problem 5. a) The differential output is taken single-ended, so = = × − g m RD . We
vs 2 2
I SS
find I D = = 30µ A and g m = 2 × 50 µVA2 × 20 × 30 µ A = 245 × 10−6 AV . Finally,
2
vd 1 1 1
= − × g m RD = − × 245 × 10−6 AV × 10kΩ = −1.225 VV . Note that the negative sign for the gain
vs 2 2
is appropriate as an increase in vs will cause a decrease in vd1 . b) First way: If vid = 0 , there
is a DC output due to the resistor mismatch. We have VOD = 30 µ A × ∆R = 6mV and then
6mV
divide VOD by Adm = 2.45 to get the input-referred offset voltage VOS = = 2.45mV .
2.45
VOV ∆R 2I D
Second way: VOS = , where VOV = = 0.245V . Then
2 R µCox WL
0.245 200
VOS = = 2.45mV .
2 10000
Problem 6. The common-mode rejection ratio (CMRR) expresses the factor by which the
difference-mode gain is greater than the common-mode gain. A high CMRR is desirable
because the amplifier should respond only to difference-mode signals. A high value of REE (tail
current source resistance) is desirable because it lowers the common-mode gain while leaving
the difference-mode gain unaffected.
Problem 7. a) First, find the bias currents. We know that the base bias voltages are zero
volts, so the emitters are at -0.7v. Ignore the 50Ω resistors and calculate
9.3V
I EE = = .93mA , and this leaves I C1 = I C 2 = .465mA . Now, we use
10kΩ
− g m RC 0.465mA
Adm = , where g m = = 18.6 × 10−3 AV . We get
1 + g m RE 0.025
−74.4
Adm = = −38.5 VV . b) The common-mode gain is found from
1 + 0.930
 − RC −4kΩ
Acm ≈ = = 0.2 VV . c) The 50µ A current source causes an output differential
2 REE 20kΩ
voltage of 0.4V. Divide this by the difference-mode gain of 74.4 and get 5.38mV offset.