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Unit 5

The document discusses standard combinational modules including decoders, multiplexers, and encoders. It covers their implementation and provides examples of decoders, multiplexers, and how to implement boolean functions using these modules. Modular networks are also introduced.

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Marwa Barbou
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0% found this document useful (0 votes)
90 views49 pages

Unit 5

The document discusses standard combinational modules including decoders, multiplexers, and encoders. It covers their implementation and provides examples of decoders, multiplexers, and how to implement boolean functions using these modules. Modular networks are also introduced.

Uploaded by

Marwa Barbou
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Combinational circuits II.

Modules & Modular Networks

Unit 5

1
Outline
Standard combinational modules.
Implementation of boolean functions
– Decoder
– Multiplexer
– Encoder
– Demultiplexer
Modular networks

2
Standard combinational modules
MSI (Medium Scale of Integration): 10-100 gates
They are circuits that implement by themselves more
complex functionalities than gates
They are made of gates
They can be used to implement boolean functions
They usually have got additional inputs labelled as
“Enable”
Types:
– encoder
– decoder
– multiplexer
– demultiplexer

3
Decoder
Binary decoder: DEC n x 2n
– Converts an encoded value, activating the output that
corresponds to the converted value.
– Each output can be a minterm or a maxterm

ENABLE
OUTPUTS
INPUTS

4
Decoder Active-low inputs,
Examples active-low outputs

Active-high inputs and outputs Active-high inputs,


active-low outputs

5
Decoder
Decoder implementation
DEC 2 x 4.
Active-high input and active-high output

A0
D0 = A1 A0 E = m0 E m0 ( A1 , A0 ) = A1 A0
A1

D1 = A1 A0 E = m1E Function table


E A1 A0 D0 D1 D2 D3
D2 = A1 A0 E = m2 E
1 0 0 1 0 0 0
1 0 1 0 1 0 0
1 1 0 0 0 1 0
E D3 = A1 A0 E = m3 E 1 1 1 0 0 0 1
0 X X 0 0 0 0

6
E

Decoder
Decoder implementation
DEC 2 x 4.
Active-high input, active-low output and
active low enable

D0 = A1 + A0 + E = M 0 + E

D1 = A1 + A0 + E = M 1 + E Function table

E A1 A0 D0 D1 D2 D3
D2 = A1 + A0 + E = M 2 + E
0 0 0 0 1 1 1
0 0 1 1 0 1 1
D3 = A1 + A0 + E = M 3 + E 0 1 0 1 1 0 1
0 1 1 1 1 1 0
1 X X 1 1 1 1

7
Decoder
Example: TTL 74138 , Dec 3x8
– Active high inputs, active low outputs
– 3 pins control the enable

8
Decoder
Example: TTL 74139 , Dec 2x4
– 2 decoders in one chip
– Active high inputs, active low outputs, active low enable

Function table
Inputs
1st decoder Outputs

Enable

2nd decoder

9
Decoder Seven-segment
Seven-segment decoder: display

BCD input

74LS47

10
Implementation with decoders
We always assume active-high inputs
Active-high outputs => The decoder generates minterms
Implementation as First Canonical Form  OR gates are
needed
Example:

0 F =  m( 0, 2,6,7 )
A B C F
1
0 0 0 1 C 0 2
0 0 1 0 B 1
DEC 3 F
0 1 0 1
0 1 1 0
A 2 3x8 4
1 0 0 0 5
1 0 1 0 6
1 1 0 1 7
1 1 1 1

11
Implementation with decoders
• If the function has fewer 0s than 1s in the truth table, it
might be better to take 0s for a simpler implementation.
• In practice, taking 0s involves to use NOR gates instead of
OR gates.
• Therefore, the rule is:
OR

1’s f

NOR
f’ f f
0’s 0’s

12
Implementation with decoders
We always assume active-high inputs
Active low outputs=> The decoder generates maxterms
Implementation as Second Canonical Form  AND Gates
are needed
Example
F =  M( 1,3, 4,5 )
A B C F 0
1
0 0 0 1 C 2
0
0 0 1 0 DEC
0 1 0 1 B 1 3
0 1 1 0 A 2 3x8 4 F
1 0 0 0 5
1 0 1 0 6
1 1 0 1
7
1 1 1 1

13
Implementation with decoders
Active low outputs
Implementation as First Canonical Form  NAND gates
are needed
Example

A B C F F =  m( 0, 2,6,7 )
0
0 0 0 1 1
0 0 1 0
0 1 0 1 C 0 2
0 1 1 0 B 1
DEC 3 F
1 0 0 0 A 2 3x8 4
1 0 1 0 5
1 1 0 1 6
1 1 1 1
7

14
Implementation with decoders
• Choose the first or second canonical form depending on the
number of 1s and 0s in the truth table.
• The rule is:

NAND

1’s f

AND
f’ f f
0’s 0’s

15
Multiplexer
2n inputs, 1 output and n control (selection) inputs : MUX 2n x 1
It selects one input according to the control inputs, that is, the
output is the data input selected by the control inputs.

ENABLE

ENABLE

OUTPUT
OUTPUT

INPUTS
INPUTS

CONTROL INPUTS
CONTROL INPUTS
16
Multiplexer
Examples

Data inputs Selected data

17
Multiplexer
Multiplexer implementation
Control inputs

3
S =  Ei mi ( C1 ,C0 )
i =0

Function table

C1 C0 E3 E2 E1 E0 S

0 0 X X X F F
0 1 X X F X F
1 0 X F X X F
1 1 F X X X F
Data inputs
18
Multiplexer
Multiplexer implementation
E Enable

Data inputs 7
f = E  Ei mi ( C2 ,C1 ,C0 )
i =0

C 2 C1 C 0
Control inputs
19
Multiplexer
Example: TTL 74151 (Mux 8x1)

Connection diagram Logic diagram


20
Implementation with multiplexers
Case 1:
• The number of variables is equal to the number of control (or selection) inputs
• The data inputs are the values of the truth table

• Example: Implement F with a multiplexer F(A,B,C) = m0 + m2 + m6 + m7

MSB A B C F
1 0
0 0 0 1
C 0 1
0 0 1 0 1 2 F
0 1 0 1 0 3 8:1
C 0 MUX
0 1 1 0 4
1 0 0 0 0 5
0 1 6
1 0 1 0 1 7 S2 S1 S0
1 1 0 1
1
1 1 1 1 A B C

Be careful on how the variables are assigned to the control inputs !!

21
Implementation with multiplexers
Case 2:
• The number of variables is greater than the number of control inputs
• Choose a set of variables to be assigned to the control inputs and use the remaining variables to
calculate the inputs.
• Example: Implement F with only one MUX 4x1 F(A,B,C) = m0 + m2 + m6 + m7

a) Taking A and B as control inputs b) Taking A and C as control inputs

A B C F A B C F
0 0 0 1 0 0 0 1
C C
0 0 1 0 0 0 1 0
0 1 0 1 C 0 0 1 0 1 C
1 0
C F C F
0 1 1 0 C 1 4:1 0 1 1 0 C
0 1 4:1
1 0 0 0 0 2 MUX 1 0 0 0 B0 2 MUX
0 1 0
1 0 1 0 3 1 0 1 0 B1 3
S1 S0 S1 S0
1 1 0 1 1 1 0 1
1 1
1 1 1 1 AA BB 1 1 1 1 AA CB

22
Case 2
A B C D F
• Example: Implement F with only one MUX 4x1. Take A and B as control inputs
0 0 0 0 1
0 0 0 1 1 A=0, B=0 A=0, B=1 A=1, B=0 A=1, B=1
0 0 1 0 0 C D E0 C D E1 C D E2 C D E3
0 0 1 1 1 0 0 1 0 0 1 0 0 0 0 0 1
0 1 0 0 1 0 1 1 0 1 1 0 1 0 0 1 0
0 1 0 1 1 1 0 0 1 0 0 1 0 0 1 0 1
0 1 1 0 0 1 1 1 1 1 0 1 1 1 1 1 0
0 1 1 1 0
1 0 0 0 0 E0 = C + D E1 = C E2 = CD E3 = D
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 1
1 1 0 1 0
1 1 1 0 1
1 1 1 1 0
23
A B C D F Case 2 Implementar F con un único Mux 4x1
• Example: Implement F with only one MUX 4x1. Take B and C as control inputs
0 0 0 0 1
0 0 0 1 1
B=0, C=0 B=0, C=1 B=1, C=0 B=1, C=1
0 0 1 0 0
A D E0 A D E1 A D E2 A D E3
0 0 1 1 1
0 0 1 0 0 0 0 0 1 0 0 0
0 1 0 0 1
0 1 1 0 1 1 0 1 1 0 1 0
0 1 0 1 1
1 0 0 1 0 0 1 0 1 1 0 1
0 1 1 0 0
1 1 0 1 1 1 1 1 0 1 1 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 1
1 1 0 1 0
1 1 1 0 1
1 1 1 1 0
24
Encoder ENABLE

Binary encoder
– 2n inputs and n outputs: ENC 2n x n

Outputs
Inputs
– It is a code converter from the “1-out-of- 2n” ENC
code to a binary code.
– Only one active input (1 or 0) at a time is
permitted.
– The output represents, in binary code, the index
of the active input.
• Inputs can be:
• Active-high: only one 1
• Active-low: only one 0
• Outputs can be:
• Active-high: binary code of the active input
• Active-low: inverse binary code of the active input

25
Encoder Active-high inputs, active-low outputs

Examples
Active-high inputs, active-high outputs

Active input

Active-low inputs, active-high outputs

26
Encoder
Encoder implementation
Active-high inputs and outputs
D0 D1 D2 D3 D4 D5 D6 D7 X Y Z

1 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 1
0 0 1 0 0 0 0 0 0 1 0
0 0 0 1 0 0 0 0 0 1 1
0 0 0 0 1 0 0 0 1 0 0
0 0 0 0 0 1 0 0 1 0 1
0 0 0 0 0 0 1 0 1 1 0
0 0 0 0 0 0 0 1 1 1 1

X = D4 + D5 + D6 + D7
Y = D2 + D3 + D6 + D7
Z = D1 + D3 + D5 + D7
27
Encoder
Problems:
– 1. What if there are two or more active inputs ?
For example: ENC(0,1,0,0,1,0,0,0)?.
According the expressions of X, Y and Z, X=1, Y=0, Z=1, but
D5=1? No
0 1
0
0
1 0
0
0
1 1
0

– 2. What if there are no active inputs?


ENC(0,0,0,0,0,0,0,0)?, according the expressions of X, Y, Z,
X=0, Y=0, Z=0, but D0 = 0

28
Encoder
Solutions
– 1. Use the input Enable (E) to activate and inactivate the Encoder

– 2. Introduce a priority circuit: In case of two or more active inputs


(1s or 0s), the priority circuits yields only one active output, which
will be the most prior input.
• To the most significant bit (MSB)
• To the least significant bit (LSB):
D0
D1 8
D2
D3
D4
D5
D6 Circuito
D7 Priority
de
circuit
Prioridad
8

29
Encoder
BCD (binary coded decimal) encoder
– Example: TTL 74147 . 9 input lines and 4 output lines. The output
represents the inverse binary code of the active input line.

Inputs Outputs

BCD Encoder

30
Encoder

Application:
– Numeric
keyboard

When a key is pressed, a 0 is


generated in the corresponding
input line

31
Demultiplexer
1 input data, 2n outputs and n control inputs. DMux 1x2n
It performes the inverse operation of the multiplexer.
The input is routed to the output selected by the control
inputs.
Same implementation of Decoder nx2n
ENABLE

OUTPUTS

OUTPUTS
INPUTS
INPUT

CONTROL INPUTS
32
Demultiplexer
Demultiplexer implementation
Active-high inputs and outputs

S1 S0 E D0 D1 D2 D3 S1 S0 E
0 0 K K 0 0 0
0 1 K 0 K 0 0
1 0 K 0 0 K 0
1 1 K 0 0 0 K

D0

D1
D2

D3

33
Demultiplexer
Demultiplexer implementation
Active high inputs, active-low outputs

S1 S0 E

S1 S0 E D0 D1 D2 D3
0 0 K K 1 1 1
0 1 K 1 K 1 1
D0
1 0 K 1 1 K 1
1 1 K 1 1 1 K D1
D2

D3
34
Modular Networks

35
Encoder association
ENC 8x3 with two ENC 4x2
– It is assumed that only one encoder can accept an active input
– Output S takes value 1 if there is an active input in the encoder.

ENC

ENC
ENC

36
Encoder association

0 0 0
0 0
ENC 1 0
1
0 1
1
1
0 0 0
0 ENC 1
0 0 ENC 0
0 0 0

37
Encoder association

0 0 0
0 1
ENC 0 1
0
0 0
0
0
0 1 0
1 ENC 0
0 0 ENC 1
0 1 1

38
Decoder association
DEC 3x8 with two DEC 2x4
– Only one decoder is active, depending on input A2
Example: (A2A1A0=110)
0
1
0
0
0
0
1

0
0 0
1 1
0
39
Decoder association
DEC 4x16 with four DEC 2x4
– In the first level DEC 2x4 is active
– In the second level just one decoder
is active, depending on A3, A2

MSB

LSB
40
0
Example: A3A2A1A0 = 1001 0
0
0
0
0
0
0
0
0
0
1
1
0
1 1
0 0
0
0
0
0
0
0
41
Multiplexer association
MUX 8x1 with MUXs 4x1 MUX 8x1 with two MUX 4x1
and one MUX 2x1
F(C2,C1,C0)

MSB

LSB
42
Example: F(C2,C1,C0)=F(1,1,0)=0

0
1 1
1
1
1 0
1
0
1
0
1
0 0
1
1 0

43
MUX 8x1 with four MUXs 2x1 and one
MUX 4x1

F(C2,C1,C0)

MSB

44
LSB
MUX 16x1 with MUXs 4x1

Z(A3,A2,A1,A0)

MSB

LSB
45
DEC & MUX association

Implementation of function Z(A3,A2,A1,A0)

MSB

LSB
46
Example: Z(A3,A2,A1,A0)
0
Z =  m( 1, 4,5,8,10,14,15 ) 1
0
0

1
1
0
0

1
0
1
0

0
0
1
1

47
Example 2: Z(A3,A2,A1,A0)
0
Z =  m( 4,5,8,10,12,13,14,15 ) 0 Always 0, if selected
0
0

1
1
0
0

1
0
1
0

1
1 Always 1, if selected
1
1

48
Example 2: Z(A3,A2,A1,A0)
0
Z =  m( 4,5,8,10,12,13,14,15 ) 0
0
0

1
1
0
0

1
0
1
0

1
1
1
1

49

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