EECE 2123L Digital Systems Laboratory

Laboratory Assignment #5: Seven-Segment Display and Arithmetic Circuits

A. Pre-Lab:

A.1. Pre-lab background

For the lab, you will build a 4-bit binary to hexadecimal on seven-segment display circuit in
Quartus, and save it as a schematic/symbol so that it may be reused in future lab exercises. The
seven-segment display provides a clear visual feedback for the functionality of the digital
components you are creating, rather than being limited to a series of LEDs in a line on the
board.

You have likely seen seven-segment displays on microwave oven displays, alarm clocks, old
calculators, etc. The seven individual segments are turned on or off to create the appearance of
a number or letter. For the display of hexadecimal digits, you will need to determine which of
the segments must be lit to properly display the digit. For this exercise, your hexadecimal digits
will be displayed as:

0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, b, C, d, E, F

Where the lower case ‘b’ and ‘d’ are used to eliminate confusion between the display of ‘8’ and
‘B’ or ‘0’ and ‘D’. For example, using the segment definitions in the figure below, the display
of the digit ‘2’ requires segments HEX0[0], HEX0[1], HEX0[6], HEX0[4], and HEX0[3] to be
turned on, or segments HEX0[3] and HEX0[5] are turned off.

Figure 1. The seven-segment display

The seven-segment display also follows inverse logic (i.e., a logic ‘0’ means that the light is on
and a logic ‘1’ means the light is off). Therefore, using the example of displaying a ‘2’ you
would set HEX0[2] and HEX0[5] to a logic 1 and the other segments to a logic 0.
 EECE 2123L Digital Systems Laboratory
A.2. Pre-lab steps
1) Using the design technique of implementing combinational logic functions with a
multiplexer, build a circuit the converts a 4-bit binary input into a hexadecimal character
(0-9, A-F) on the seven-segment display. You should utilize your 8-to-1 multiplexer
that was designed and exercised in Lab 4. The final circuit should contain seven
multiplexer-based logic functions that each drive an individual segment in the display.
For example, the truth table and multiplexer circuit for segment HEX0[0] is provided
here:

A[3] A[2] A[1] A[0] Hexadecimal HEX0[0]

0 0 0 0 0 0
0 0 0 1 1 1
0 0 1 0 2 0
0 0 1 1 3 0
0 1 0 0 4 1
0 1 0 1 5 0
0 1 1 0 6 0
0 1 1 1 7 0
1 0 0 0 8 0
1 0 0 1 9 0
1 0 1 0 A 0
1 0 1 1 b 1
1 1 0 0 C 0
1 1 0 1 d 1
1 1 1 0 E 0
1 1 1 1 F 0

A[0] I[0]

A[0]

0
HEX0[0]
0

A[0]

A[0]

0 I[7]
MSB LSB

A[3] A[2] A[1]

 EECE 2123L Digital Systems Laboratory
Complete the truth tables for all of the segments and design the multiplexer circuits for
the segments 0 to 2, implementing the designs in Quartus. The use of connect by name
will allow you to maintain a much more organized schematic. See the videos on Quartus
help under Course Resources for an example of using connect by name in Quartus. A
hierarchical approach to the design is likely going to be beneficial. An example of this
approach is to create a driver schematic and symbol for each HEX0 segment, then create
the schematic for the full driver using the seven symbols that are specific to each
segment. In the lab, you will save the full circuit of the seven segment driver symbol for
use later.

Recall that you cannot start filename with a digit, so you may want to name your
circuits as seg0.bdf, seg1.bdf, etc. and then sevenSegDisplay.bdf for the top level.

The symbol should have four inputs for the binary number, from MSB to LSB as A[3],
A[2], A[1], A[0], and seven outputs to drive the seven segments of the display, HEX0[0-
6] as shown in Fig. 1.

2) Simulate the seven-segment display circuit for segments 0 to 2 to ensure that the circuit
outputs match the truth table for the circuit function.

3) Optional to get a head start in lab: finish the remaining segments and look at the 4-bit
adder with display that you will design in the first part of the lab session, you may go
ahead and start on this if you have time, but it will not be graded as a part of the prelab,
although it will be graded as a part of the in-lab demos, so it is a good idea to start
looking into at least how to do it so you will finish the in-lab demos.
 EECE 2123L Digital Systems Laboratory
-------------------------------------------------------------------------------
Please submit your truth table for each segment (recall that off = 1 and on = 0), circuit
schematics for segments 0 to 2, and the waveforms for segments 0 to 2, which show the
functional operation of the segment display drivers. Pre-lab work should be submitted to
Brightspace before the start of your lab session. If you have some that are not working just right,
submit what you have, but it will add to the time that you are in lab.
-------------------------------------------------------------------------------
 EECE 2123L Digital Systems Laboratory
B. In-Lab:
Complete the remaining segments for the seven-segment display driver, and build the top-
level schematic and symbol that accepts the four inputs and has outputs for each of the seven
segments.

Design a circuit that uses switches as inputs to the 4-bit adder circuit from Lab 4 and the Lab
4 Post-Lab Simulations. The inputs A[0-3], B[0-3], and carry-in should be mapped to the
switches. A[0-3] should also be connected as the input to a binary-to-hexadecimal display
circuit (the seven-segement driver that you have created in this lab), likewise B[0-3] and
Sum[0-3] should also be connected to binary-to-hexadecimal display circuits. As a means of
monitoring the carry-in and carry-out values, please map those inputs/outputs to turn on
LEDs for an input of 1 (one LED for carry-in and one LED for carry-out). This circuit will
allow you to visualize the two numbers you are adding and the sum of the numbers, where the
carry-out LED will signify a carry beyond the 4-bit number range.

Demo Part 1
Demonstrate the functionality of the seven-segment display by mapping the four binary
inputs to switches. Demonstrate that you can set the switches to the following binary
inputs and get the display should show the corresponding hexadecimal digit.

Binary Hexadecimal
0000 0
0010 2
1001 9
1010 A
1011 B
1101 d

Demo Part 2
Demonstrate the functionality of the 4-bit adder with numerical display. Demonstrate
that you can set the switches to the following binary inputs and get the display should
show the corresponding hexadecimal digits and carry-in/out LEDs. (Carry LEDs off
unless noted)

A B Carry-In Hexadecimal Displays

0000 0010 0 0, 2, 2
0010 0010 0 2, 2, 4
0110 0100 0 6, 4, A
1000 0101 0 8, 5, d
1000 0101 1 8, 5, E (carry-in LED on)
1001 1000 0 9, 8, 1 (carry-out LED on)
1010 1011 1 A, b, 6 (carry LEDs on)

C. Post-Lab
C.1. How could the seven-segment display driver be designed using a 4-to-16 decoder
 EECE 2123L Digital Systems Laboratory
and logic gates rather than multiplexers?

C.2. What do you think would happen if the B inputs in Demo Part 2 are set to 0, the
sum outputs were connected to the A inputs, and carry-in is set to 1? Is this behavior desirable?
Is it controllable?