SEQUENTIAL CIRCUITS
Objectives
Sequential Circuits generally have Storage Elements (Memory)
Latches Flip-Flops
Combinational vs. Sequential Combinational Circuits
inputs X
Combinational Circuits outputs Z
A combinational circuit features are: outputs depends only on inputs
Change in input values changes the output values too.
No consideration of previous inputs
Since there is No memory to store the history of previous i/ps
Time is ignored !
Combinational vs Sequential Sequential Circuits
inputs X
present state Memory
Combinational Circuits
outputs Z
next state
A sequential circuit can be described as a A combinational circuit with feedback through memory The stored information at any time defines a state Outputs depends on inputs and previous inputs Previous inputs are stored as binary information into memory Next state depends on inputs and present state
Examples of sequential systems
Traffic light
ATM
Vending machine
What is common between these systems?
Combinational Adder
4-bit adder (ripple-carry) Notice how carry-out propagates One adder is active at a time 4 full adders are needed
Sequential Adder
1-bit memory and 2 4-bit memory Only one full-adder! 4 clocks to get the output The 1-bit memory defines the circuit state (0 or 1)
Types of Sequential Circuits
Two types of sequential circuits:
Synchronous: The behavior of the circuit depends on the input signal at discrete instances of time (also called clocked) Asynchronous: The behavior of the circuit depends on the input signals at any instance of time and the order of the inputs change A combinational circuit with feedback
Synchronous Sequential Circuits
inputs X
present state Flip-Flops clock
Combinational Circuits
outputs Z
next state
Synchronous circuits employs a synchronizing signal called clock (a periodic train of pulses; 0s and 1s) A clock determines when computational activities occur Other signals determines what changes will occur
Synchronous Sequential Circuits
inputs X
present state Flip-Flops clock Combinational Circuits outputs Z
next state
The storage elements (memory) used in clocked sequential circuits are called flip-flops
Each flip-flop can store one bit of information 0,1
A circuit may use many flip-flops; together they define the circuit state
Flip-Flops (memory/state) update only with the clock
Storage Elements (Memory)
A storage element can maintain a binary state (0,1) indefinitely, until directed by an input signal to switch state Main difference between storage elements: Number of inputs they have How the inputs affect the binary state Two main types: Latches (level-sensitive) Flip-Flops (edge-sensitive) Latches are useful in asynchronous sequential circuits Flip-Flips are built with latches
Latches
A latch is binary storage element Can store a 0 or 1 The most basic memory Easy to build
Built with gates (NORs, NANDs, NOT)
SR Latch
What does this circuit do?
SR Latch
Two states: Set (Q = 1) and Reset (Q = 0) When S=R=0, Q remains the same, S=R=1 is not allowed! Normally, S=R=0 unless the state need to be changed (memory?) State of the circuit depends not only on the current inputs, but also on the recent history of the inputs
S R Latch
How about this circuit?
S R Latch
Similar to SR latch (complemented) Two states: Set (Q = 0) and Reset (Q = 1) When S=R=1, Q remains the same S=R=0 is not allowed!
SR Latch with Clock
An SR Latch can be modified to control when it changes An additional input signal Clock (C) When C=0, the S and R inputs have no effect on the latch When C=1, the inputs affect the state of the latch and possibly the output
SR Latch with Clock (cont.)
How can we eliminate the undefined state?
D Latch
S
Ensure S and R are never equal to 1 at the same time Add inverter Only one input (D)
D connects to S D connects to R
D stands for data Output follows the input when C = 1
Transparent
When C = 0, Q remains the same
Graphic Symbols for Latches
clk
A latch is designated by a rectangular block with inputs on the left and outputs on the right One output designates the normal output, the other (with the bubble) designates the complement For SR (SR built with NANDs), bubbles added to the input
Problem with Latches
inputs X
Combinational Circuits Latches? clock Example
outputs Z
What happens if Clock=1? What will be the value of Q when Clock goes to 0?
D
Clock
Q Q
Problem: A latch is transparent; state keep changing as long as the clock remains active
Due to this uncertainty, latches can not be reliably used as storage elements.
Flip Flops
A flip-flop is a one bit memory similar to latches
Solves the issue of latch transparency Latches are level sensitive memory element Active when the clock = 1 (whole duration) Flip-Flops are edge-triggered or edge-sensitive memory element Active only at transitions; i.e. either from 0 1 or 1 0
level
positive (rising) edge
negative (falling) edge
Flip Flops
clk clk
A flip flop can be built using two latches in a master-slave configuration A master latch receives external inputs A slave latch receives inputs from the master latch Depending on the clock signal, only one latch is active at any given time
If clk=1, the master latch is enabled and the inputs are latched if clk=0, the master is disabled and the slave is activated to generate the outputs
Flip Flops
clk clk
Important Timing Considerations:
Delay of logic gates inside the flip-flop Setup Time (Ts): The minimum time during which D input must be maintained before the clock transition occurs. Hold Time (Th): The minimum time during which D input must not be changed after the clock transition occurs.
SR Flip Flop
Built using two latches (Master and Slave)
C = 1, master is active C = 0, slave is active
Q is sampled at the falling edge Data is entered on the rising edge of the clock pulse, but the output does not reflect the change until the falling edge of the clock pulse.
Graphic Symbols for Flip Flops
A Flip Flop is designated by a rectangular block with inputs on the left and outputs on the right (similar to latches) The clock is designated with an arrowhead A bubble designates a negative-edge triggered flip flops
Other Flip Flops
JK Flip Flop
How does it work? Hint: D = ?
Other Flip Flops
JK Flip Flop
D = J Q + K Q J sets the flip flop (1) K reset the flip flop (0) When J = K = 1, the output is complemented
Other Flip Flops
JK Flip Flop
D = J Q + K Q JK Flip Flop built with SR latches J sets the flip flop (1) K reset the flip flop (0) When J = K = 1, the output is complemented
Other Flip Flops (cont.)
T Flip Flop
T (toggle) flip flop is a complementing flip flop Built with a JK or D flip flop (as shown above) T = 0, no change, T = 1, complement (toggle) For D-FF implementation, D = T Q
Characteristic Tables
A characteristic table defines the operation of a flip flop in a tabular form Next state is defined in terms of the current state and the inputs
Q(t) refers to current state (before the clock arrives) Q(t+1) refers to next state (after the clock arrives)
Similar to the truth table in combinational circuits
Characteristic Equations
A characteristic equation defines the operation of a flip flop in an algebraic form For D-FF
Q(t+1) = D
For JK-FF
Q(t+1) = J Q + K Q
For T-FF
Q(t+1) = T Q
Direct Inputs
Some flip-flops have asynchronous inputs to set/reset their states independently of the clock. Preset or direct set, sets the flip-flop to 1
Clear or direct reset, set the flip-flop to 0
When power is turned on, a flip-flop state is unknown; Direct inputs are useful to put in a known state Figure shows a positive-edge D-FF with active-low asynchronous reset.
Flip Flops Sheet (Manos Textbook)
Summary
In a sequential circuit, outputs depends on inputs and previous inputs
Previous inputs are stored as binary information into memory The stored information at any time defines a state Similarly, next state depends on inputs and present state
Two types of sequential circuits: Synchronous and Asynchronous Two types of Memory elements: Latches and FlipFlops. Flip-flops are built with latches A flip-flop is described using characteristic table/equation
